Merge branch 'release/v1.3.0'

.github/workflows/examples.yml

@@ -29,4 +29,4 @@ jobs:
           pio pkg install --global --platform symlink://.
       - name: Build examples
         run: |
-          platformio run -d ${{ matrix.example }}
+          pio run -d ${{ matrix.example }}

README.md

@@ -1,4 +1,4 @@
-# CHIPS Alliance: development platform for [PlatformIO](http://platformio.org)
+# CHIPS Alliance: development platform for [PlatformIO](https://platformio.org)
 
 [![Build Status](https://github.com/platformio/platform-chipsalliance/workflows/Examples/badge.svg)](https://github.com/platformio/platform-chipsalliance/actions)
 
@@ -9,7 +9,7 @@ CHIPS Alliance brings the power of open source and software automation to the se
 
 # Usage
 
-1. [Install PlatformIO](http://platformio.org)
+1. [Install PlatformIO](https://platformio.org)
 2. Create PlatformIO project and configure a platform option in [platformio.ini](https://docs.platformio.org/page/projectconf.html) file:
 
 ## Stable version

builder/main.py

@@ -89,6 +89,15 @@ def run_verilator(target, source, env):
     p.terminate()
 
 
+def run_RVfpgaViDBoPipeline(target, source, env):
+    cmd = [
+        env.BoardConfig().get("debug.verilator.binary"),
+        "+ram_init_file=" + os.path.basename(source[0].get_path())
+    ]
+
+    p = subprocess.run(cmd, cwd=env.subst("$BUILD_DIR"))
+
+
 env = DefaultEnvironment()
 platform = env.PioPlatform()
 board_config = env.BoardConfig()
@@ -213,7 +222,7 @@ def run_verilator(target, source, env):
                     "scripts",
                 ),
                 "-c",
-                '"set BITFILE {$SOURCE}"',
+                '"set BITFILE {"$SOURCE"}"',
                 "-f",
                 "%s_program.cfg" % env.subst("$BOARD")
             ]
@@ -231,6 +240,14 @@ def run_verilator(target, source, env):
     run_verilator, "Generating trace from Verilator"), "Generate Trace")
 
 
+#
+# Target: Run RVfpga-ViDBo/PipelineSimulator
+#
+
+env.AddPlatformTarget("ViDBo", target_vh, env.VerboseAction(
+    run_RVfpgaViDBoPipeline, "Running Program in RVfpga-ViDBo or RVfpga-PipelineSimulator"), "RVfpga-ViDBo/Pipeline")
+
+
 #
 # Target: Run Verilator simulator to connect OpenOCD
 #

platform.json

@@ -1,6 +1,6 @@
 {
   "name": "chipsalliance",
-  "version": "1.2.0",
+  "version": "1.3.0",
   "title": "CHIPS Alliance",
   "description": "The CHIPS Alliance develops high-quality, open source hardware designs relevant to silicon devices and FPGAs.",
   "homepage": "https://chipsalliance.org",

platform.py

@@ -124,7 +124,6 @@ def _add_default_debug_tools(self, board):
                     "arguments": server_args,
                 },
                 "onboard": tool in debug.get("onboard_tools", [])
-                or tool in ("verilator", "whisper"),
             }
 
         board.manifest["debug"] = debug