Skip to content
New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

Disable AC Emulation in Fast DC Security Analysis #1173

Open
wants to merge 17 commits into
base: main
Choose a base branch
from
Open
Show file tree
Hide file tree
Changes from 7 commits
Commits
File filter

Filter by extension

Filter by extension

Conversations
Failed to load comments.
Loading
Jump to
Jump to file
Failed to load files.
Loading
Diff view
Diff view
2 changes: 1 addition & 1 deletion README.md
Original file line number Diff line number Diff line change
Expand Up @@ -69,7 +69,7 @@ Heterogeneous voltage controls management has become a key feature. All well-mod
- Complex cases where the contingency leads to another synchronous component where a new resolution has to be performed are not supported at that stage. The loss of slack bus during a contingency is not supported yet, but the work is in progress.
- The active and reactive power flows on branches, as well as angle and voltage at buses, can be monitored and collected for later analysis after the base case and after each contingency.
- Remedial actions such as: switch action, terminal(s) connection action, re-dispatching action
- Fast DC mode available, based on Woodbury's formula for calculating post-contingency states. Note that this mode has limitations for the moment. Only PST remedial actions are taken into account now. Contingencies on HVDC lines are not yet taken into account in AC emulation mode.
- Fast DC mode available, based on Woodbury's formula for calculating post-contingency states. Note that this mode has limitations for the moment. Only PST remedial actions are taken into account now. AC emulation mode of HVDC lines is not yet taken into account.

vidaldid-rte marked this conversation as resolved.
Show resolved Hide resolved
### Sensitivity analysis implementation

Expand Down
2 changes: 1 addition & 1 deletion docs/security/parameters.md
Original file line number Diff line number Diff line change
Expand Up @@ -56,7 +56,7 @@ when DC mode is activated.

Please note that fast mode has a few limitations:
- Contingencies applied on branches opened on one side are ignored.
- Contingencies applied on HVDC lines in AC emulation mode are ignored.
- AC emulation of HVDC lines is disabled.
p-arvy marked this conversation as resolved.
Show resolved Hide resolved
- Only PST remedial actions are supported for now.
- Slack relocation following the application of a contingency is not supported.
As a result, security analysis is carried out only in slack component, and not necessarily in the largest one.
Expand Down
Original file line number Diff line number Diff line change
Expand Up @@ -68,8 +68,11 @@ protected ReportNode createSaRootReportNode() {
@Override
protected DcLoadFlowParameters createParameters(LoadFlowParameters lfParameters, OpenLoadFlowParameters lfParametersExt, boolean breakers) {
DcLoadFlowParameters dcParameters = super.createParameters(lfParameters, lfParametersExt, breakers);
// connectivity break analysis does not handle zero impedance lines
dcParameters.getNetworkParameters().setMinImpedance(true);
dcParameters.getNetworkParameters()
// connectivity break analysis does not handle zero impedance lines
.setMinImpedance(true)
// ac emulation is not yet supported
.setHvdcAcEmulation(false);
// needed an equation to force angle to zero when a PST is lost
p-arvy marked this conversation as resolved.
Show resolved Hide resolved
dcParameters.getEquationSystemCreationParameters().setForcePhaseControlOffAndAddAngle1Var(true);
return dcParameters;
Expand Down
Original file line number Diff line number Diff line change
Expand Up @@ -4056,4 +4056,73 @@ void testNoCc0Sc0() {
assertEquals(LoadFlowResult.ComponentResult.Status.CONVERGED, saResultAll.getPreContingencyResult().getStatus());
assertEquals(6, saResultAll.getPreContingencyResult().getNetworkResult().getBusResults().size()); // 6 buses in total
}

@ParameterizedTest
@ValueSource(booleans = {false, true})
void testDcSaHvdcLineContingency(boolean dcFastMode) {
Network network = HvdcNetworkFactory.createNetworkWithGenerators();

SecurityAnalysisParameters securityAnalysisParameters = new SecurityAnalysisParameters();
securityAnalysisParameters.getLoadFlowParameters().setDc(true).setHvdcAcEmulation(true);
OpenSecurityAnalysisParameters openSecurityAnalysisParameters = new OpenSecurityAnalysisParameters();
vidaldid-rte marked this conversation as resolved.
Show resolved Hide resolved
openSecurityAnalysisParameters.setDcFastMode(dcFastMode);
securityAnalysisParameters.addExtension(OpenSecurityAnalysisParameters.class, openSecurityAnalysisParameters);

List<StateMonitor> monitors = createAllBranchesMonitors(network);
List<Contingency> contingencies = List.of(new Contingency("hvdc34+g1", List.of(new HvdcLineContingency("hvdc34"), new GeneratorContingency("g1"))));
SecurityAnalysisResult result = runSecurityAnalysis(network, contingencies, monitors, securityAnalysisParameters);

// apply contingency by hand
network.getHvdcLine("hvdc34").remove();
network.getGenerator("g1").disconnect();
// run load flow to compare results
loadFlowRunner.run(network, securityAnalysisParameters.getLoadFlowParameters());

// post-contingency tests
PostContingencyResult postContingencyResult = getPostContingencyResult(result, "hvdc34+g1");
assertEquals(network.getLine("l12").getTerminal1().getP(), postContingencyResult.getNetworkResult().getBranchResult("l12").getP1(), LoadFlowAssert.DELTA_POWER);
assertEquals(network.getLine("l13").getTerminal1().getP(), postContingencyResult.getNetworkResult().getBranchResult("l13").getP1(), LoadFlowAssert.DELTA_POWER);
assertEquals(network.getLine("l23").getTerminal1().getP(), postContingencyResult.getNetworkResult().getBranchResult("l23").getP1(), LoadFlowAssert.DELTA_POWER);
assertEquals(network.getLine("l25").getTerminal1().getP(), postContingencyResult.getNetworkResult().getBranchResult("l25").getP1(), LoadFlowAssert.DELTA_POWER);
assertEquals(network.getLine("l45").getTerminal1().getP(), postContingencyResult.getNetworkResult().getBranchResult("l45").getP1(), LoadFlowAssert.DELTA_POWER);
assertEquals(network.getLine("l46").getTerminal1().getP(), postContingencyResult.getNetworkResult().getBranchResult("l46").getP1(), LoadFlowAssert.DELTA_POWER);
assertEquals(network.getLine("l56").getTerminal1().getP(), postContingencyResult.getNetworkResult().getBranchResult("l56").getP1(), LoadFlowAssert.DELTA_POWER);
}

@ParameterizedTest
@ValueSource(booleans = {false, true})
void testDcSaHvdcLineInAcEmulationContingency(boolean dcFastMode) {
Network network = HvdcNetworkFactory.createHvdcInAcEmulationInSymetricNetwork();
network.newLine()
.setId("l12_2")
.setBus1("b1")
.setConnectableBus1("b1")
.setBus2("b2")
.setConnectableBus2("b2")
.setR(0)
.setX(0.2f)
.add();

SecurityAnalysisParameters securityAnalysisParameters = new SecurityAnalysisParameters();
securityAnalysisParameters.getLoadFlowParameters().setDc(true).setHvdcAcEmulation(true);
OpenSecurityAnalysisParameters openSecurityAnalysisParameters = new OpenSecurityAnalysisParameters();
openSecurityAnalysisParameters.setDcFastMode(dcFastMode);
securityAnalysisParameters.addExtension(OpenSecurityAnalysisParameters.class, openSecurityAnalysisParameters);

List<StateMonitor> monitors = createAllBranchesMonitors(network);
List<Contingency> contingencies = List.of(Contingency.hvdcLine("hvdc12"));
SecurityAnalysisResult result = runSecurityAnalysis(network, contingencies, monitors, securityAnalysisParameters);

// apply contingency by hand
network.getHvdcLine("hvdc12").remove();
// run load flow to compare results
loadFlowRunner.run(network, securityAnalysisParameters.getLoadFlowParameters());

// post-contingency tests
PostContingencyResult hvdcContingencyResult = getPostContingencyResult(result, "hvdc12");
assertEquals(network.getLine("l12").getTerminal1().getP(), hvdcContingencyResult.getNetworkResult().getBranchResult("l12").getP1(), LoadFlowAssert.DELTA_POWER);
assertEquals(network.getLine("l12").getTerminal2().getP(), hvdcContingencyResult.getNetworkResult().getBranchResult("l12").getP2(), LoadFlowAssert.DELTA_POWER);
assertEquals(network.getLine("l12_2").getTerminal1().getP(), hvdcContingencyResult.getNetworkResult().getBranchResult("l12_2").getP1(), LoadFlowAssert.DELTA_POWER);
assertEquals(network.getLine("l12_2").getTerminal2().getP(), hvdcContingencyResult.getNetworkResult().getBranchResult("l12_2").getP2(), LoadFlowAssert.DELTA_POWER);
}
}