Add risc-v support

.github/workflows/ci.yml

@@ -27,8 +27,8 @@ jobs:
         cargo install cargo-binutils
         rustup component add llvm-tools-preview
     - name: Check
-      run: cargo check --target thumbv7em-none-eabi
+      run: cargo check --features cortex-m --target thumbv7em-none-eabi
     - name: Clippy
-      run: cargo clippy --target thumbv7em-none-eabi
+      run: cargo clippy --features cortex-m --target thumbv7em-none-eabi
     - name: Format
       run: cargo fmt

Cargo.toml

@@ -15,3 +15,5 @@ default = ["erase-chip", "panic-handler"]
 erase-chip = []
 panic-handler = []
 verify = []
+cortex-m = []
+risc-v = []

src/lib.rs

@@ -12,11 +12,20 @@
 #![no_main]
 #![macro_use]
 
+#[cfg(all(
+    not(any(feature = "cortex-m", feature = "risc-v")),
+    all(not(test), feature = "panic-handler")
+))]
+compile_error!("Enable either the cortex-m or risc-v feature");
+
 #[cfg(all(not(test), feature = "panic-handler"))]
 #[panic_handler]
 fn panic(_info: &core::panic::PanicInfo) -> ! {
     unsafe {
+        #[cfg(feature = "cortex-m")]
         core::arch::asm!("udf #0");
+        #[cfg(feature = "risc-v")]
+        core::arch::asm!("UNIMP");
         core::hint::unreachable_unchecked();
     }
 }