tests/disassembler.rs: Add non-regression test for -0x8000 offset

Make sure we do not panic again when trying to negate the 0x8000 offset
for load, store, jump instructions.

Link: #91
Link: #92
Signed-off-by: Quentin Monnet <quentin@isovalent.com>
Signed-off-by: Richard Smith <ret2happy@126.com>

tests/disassembler.rs

@@ -303,3 +303,40 @@ fn test_large_immediate() {
     disasm!("add64 r1, 0x7fffffff");
     disasm!("add64 r1, 0x7fffffff");
 }
+
+// Non-regression tests for overflow when trying to negate offset 0x8000i16.
+#[test]
+fn test_offset_overflow() {
+    let insns = [
+        0x62, 0x01, 0x00, 0x80, 0x01, 0x00, 0x00, 0x00, // stw
+        0x6a, 0x01, 0x00, 0x80, 0x01, 0x00, 0x00, 0x00, // sth
+        0x72, 0x01, 0x00, 0x80, 0x01, 0x00, 0x00, 0x00, // stb
+        0x7a, 0x01, 0x00, 0x80, 0x01, 0x00, 0x00, 0x00, // stdw
+        0x61, 0x01, 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, // ldxw
+        0x69, 0x01, 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, // ldxh
+        0x71, 0x01, 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, // ldxb
+        0x79, 0x01, 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, // ldxdw
+        0x15, 0x01, 0x00, 0x80, 0x02, 0x00, 0x00, 0x00, // jeq (imm)
+        0x1d, 0x21, 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, // jeq (reg)
+        0x16, 0x01, 0x00, 0x80, 0x02, 0x00, 0x00, 0x00, // jeq32 (imm)
+        0x1e, 0x21, 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, // jeq32 (reg)
+    ];
+
+    let expected_output = "stw [r1-0x8000], 0x1
+sth [r1-0x8000], 0x1
+stb [r1-0x8000], 0x1
+stdw [r1-0x8000], 0x1
+ldxw r1, [r0-0x8000]
+ldxh r1, [r0-0x8000]
+ldxb r1, [r0-0x8000]
+ldxdw r1, [r0-0x8000]
+jeq r1, 0x2, -0x8000
+jeq r1, r2, -0x8000
+jeq32 r1, 0x2, -0x8000
+jeq32 r1, r2, -0x8000";
+
+    let prog = to_insn_vec(&insns);
+    let asm = prog.into_iter().map(|ins| ins.desc).collect::<Vec<_>>().join("\n");
+
+    assert_eq!(asm, expected_output);
+}