mypy

qualtran/_infra/controlled.py

@@ -284,7 +284,7 @@ def from_cirq_cv(
         for qdtype, shape in zip(qdtypes, shapes):
             full_shape = shape + (qdtype.num_qubits,)
             curr_cvs_bits = np.array(cv[idx : idx + int(np.prod(full_shape))]).reshape(full_shape)
-            curr_cvs = np.apply_along_axis(qdtype.from_bits, -1, curr_cvs_bits)  # type: ignore[arg-type]
+            curr_cvs = np.apply_along_axis(qdtype.from_bits, -1, curr_cvs_bits)  # type: ignore
             bloq_cvs.append(curr_cvs)
         return CtrlSpec(tuple(qdtypes), tuple(bloq_cvs))
 

qualtran/bloqs/multiplexers/apply_lth_bloq.py

@@ -98,7 +98,7 @@ def selection_registers(self) -> Tuple[Register, ...]:
 
     @cached_property
     def target_registers(self) -> Tuple[Register, ...]:
-        return tuple(self.ops.flat[0].signature)
+        return tuple(self.ops.flat[0].signature)  # type: ignore
 
     def nth_operation_callgraph(self, **kwargs: int) -> Set[BloqCountT]:
         return {(self.ops[tuple(kwargs.values())].controlled(), 1)}

qualtran/bloqs/multiplexers/selected_majorana_fermion.py

@@ -100,7 +100,9 @@ def decompose_from_registers(
         self, context: cirq.DecompositionContext, **quregs: NDArray[cirq.Qid]
     ) -> Iterator[cirq.OP_TREE]:
         quregs['accumulator'] = np.array(context.qubit_manager.qalloc(1))
-        control = quregs[self.control_regs[0].name] if total_bits(self.control_registers) else []
+        control: Sequence['cirq.Qid'] = (
+            quregs[self.control_regs[0].name].tolist() if total_bits(self.control_registers) else []
+        )
         yield cirq.X(*quregs['accumulator']).controlled_by(*control)
         yield super(SelectedMajoranaFermion, self).decompose_from_registers(
             context=context, **quregs

qualtran/cirq_interop/_bloq_to_cirq.py

@@ -255,7 +255,7 @@ def _cbloq_to_cirq_circuit(
         cirq_quregs: The output mapping from right register names to Cirq qubit arrays.
     """
     cirq_quregs: Dict[str, 'CirqQuregInT'] = {
-        k: np.apply_along_axis(_QReg, -1, *(v, signature.get_left(k).dtype))  # type: ignore[arg-type]
+        k: np.apply_along_axis(_QReg, -1, *(v, signature.get_left(k).dtype))  # type: ignore
         for k, v in cirq_quregs.items()
     }
     qvar_to_qreg: Dict[Soquet, _QReg] = {

qualtran/cirq_interop/_cirq_to_bloq.py

@@ -480,11 +480,11 @@ def cirq_optree_to_cbloq(
         raise ValueError("`signature` requires specifying both `in_quregs` and `out_quregs`.")
 
     in_quregs: Dict[str, NDArray] = {
-        k: np.apply_along_axis(_QReg, -1, *(v, signature.get_left(k).dtype))  # type: ignore[arg-type]
+        k: np.apply_along_axis(_QReg, -1, *(v, signature.get_left(k).dtype))  # type: ignore
         for k, v in in_quregs.items()
     }
     out_quregs: Dict[str, NDArray] = {
-        k: np.apply_along_axis(_QReg, -1, *(v, signature.get_right(k).dtype))  # type: ignore[arg-type]
+        k: np.apply_along_axis(_QReg, -1, *(v, signature.get_right(k).dtype))  # type: ignore
         for k, v in out_quregs.items()
     }
 
@@ -515,7 +515,7 @@ def cirq_optree_to_cbloq(
         reg_dtypes = [r.dtype for r in bloq.signature]
         # 3.1 Find input / output registers.
         all_op_quregs: Dict[str, NDArray[_QReg]] = {
-            k: np.apply_along_axis(_QReg, -1, *(v, reg_dtypes[i]))  # type: ignore[arg-type]
+            k: np.apply_along_axis(_QReg, -1, *(v, reg_dtypes[i]))  # type: ignore
             for i, (k, v) in enumerate(split_qubits(bloq.signature, op.qubits).items())
         }