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Merge pull request #8 from r2axz/r2axz-document-control-signals
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Add Control Signals Description
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r2axz authored Nov 11, 2020
2 parents 205c308 + 2cabbda commit 41083e4
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25 changes: 23 additions & 2 deletions README.md
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Expand Up @@ -25,8 +25,8 @@ board appears to be OK with your computer, don't bother fixing it.
## Features

* 3 independent _UART_ ports;
* Hardware flow control (_RTS_/_CTS_) support<sup>1</sup>;
* _DSR_/_DTR_/_DCD_ signals support;
* Hardware flow control (**RTS**/**CTS**) support<sup>1</sup>;
* **DSR**/**DTR**/**DCD** signals support;
* 7 or 8 bit word length;
* None, even, odd parity;
* 1, 1.5, and 2 stop bits;
Expand Down Expand Up @@ -73,6 +73,27 @@ or damage may occur.**

Note: **5 V** tolerant input pins are shown **in bold**.

## Control Signals

**RTS**, **CTS**, **DSR**, **DTR**, **DCD** are **active-low** signals.

**DSR**, **DTR**, and **DCD** are connected to the internal _weak pull-up_
resistors, so they remain inactive at rest.

**CTS** is **pulled down** internally, which enables _UART TX_ when nothing is
connected to **CTS**. Hardware flow control is always on, but it does not get
in the way of communications as long as nothing is connected to the flow control lines.

**RTS** can be controlled by the host, but as soon as the _UART RX_ buffer is
**half-full**, **RTS** is forced to the **inactive** state. As long as more than
one half of the buffer space is available, **RTS** remains in the state set
by the host. Please take this behaviour into account if you rely on the
**RTS** signal to control non-standard periphery.

**DSR** and **DCD** are polled 50 times per second.

_UART DMA RX/TX_ buffer size is **1024** bytes.

## Flashing Firmware

Download binary firmware from the
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