getting_started

Getting Started

AMD Vitis Design

• RapidStream can be used as a plugin for the v++ command in AMD Vitis.
• This recipe demonstrates how to:
  1. Create a RapidStream project.
  2. Specify the Vitis platform.
  3. Add Xilinx Object files (.xo).
  4. Generate an optimized .xo file for v++.

Mixed Sources Design

• RapidStream supports various input formats.
• This recipe shows how to:
  1. Add Verilog source files (.v).
  2. Specify interface information in Verilog pragmas.
  3. Parse HLS report files for interface details.
  4. Infer interface information from XCI files.
  5. Manually specify the top-level module name and other constraints.

TAPA Sources Design

• RapidStream can be used as a plugin for the v++ command in AMD Vitis.
• This recipe demonstrates how to:
  1. Use RapidStream TAPA to generate a .xo file.
  2. Generate Virtual device for coarse grain floorplan.
  3. Use Rapidstream to perform optimization and generate a new .xo file.
  4. Use v++ to link the optimized .xo file.

Custom Vitis Platforms

• RapidStream can infer resource information from a Vitis platform.
• This recipe demonstrates how RapidStream:
  1. Uses Vivado to obtain resource data.
  2. Adjusts availability based on the occupancy of the Vitis shell.

Custom Vivado Parts

• Defining a Vivado device part for RapidStream is straightforward.
• This recipe shows how to:
  1. Specify pblock information.
  2. Let RapidStream infer resource information from the part number.