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feat(digit_reg): update scripts for tapaopt
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vagrantxiao24 committed Sep 9, 2024
1 parent 295a6e4 commit df13816
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Showing 11 changed files with 108 additions and 50 deletions.
1 change: 1 addition & 0 deletions .gitignore
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Expand Up @@ -449,3 +449,4 @@ _x.*/
*.bit
bazel-*
MODULE.bazel*
work.out
75 changes: 32 additions & 43 deletions benchmarks/tapa_flow/digit_recognizer/Makefile
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Expand Up @@ -2,63 +2,52 @@
# The contributor(s) of this file has/have agreed to the RapidStream Contributor License Agreement.

ROOT_DIR := $(shell git rev-parse --show-toplevel)
PLATFORM := xilinx_u280_gen3x16_xdma_1_202211_1
PART_NUM := xcu280-fsvh2892-2L-e
GRP_UTIL := $(ROOT_DIR)/common/util/get_group.py
RS_SCRIPT := run.py
KERNEL_NAME := digit_recognizer
SRC_DIR := $(CURDIR)/design
TARGET := hw
CARD_NAME := u55c
AB_CONFIG := $(CURDIR)/design/config/ab_$(CARD_NAME).json
IMPL_CONFIG := $(CURDIR)/design/config/impl_$(CARD_NAME).json
LINK_CONFIG := $(CURDIR)/design/config/link_$(CARD_NAME).ini
PLATFORM := xilinx_u55c_gen3x16_xdma_3_202210_1
GRP_UTIL := $(ROOT_DIR)/common/util/get_group.py
RS_SCRIPT := $(CURDIR)/run_u55c.py
TEMP_DIR := $(CURDIR)/build/$(notdir $(RS_SCRIPT))
KERNEL_XO := $(TEMP_DIR)/$(KERNEL_NAME).xo
KERNEL_XCLBIN := $(TEMP_DIR)/$(KERNEL_NAME).xclbin
RS_KERNEL_XCLBIN := $(TEMP_DIR)/dse/candidate_0/vitis_run_hw/$(KERNEL_NAME)_$(PLATFORM).xclbin
INCLUDE := -I $(XILINX_HLS)/include
CFLAGS := $(INCLUDE) $(OPT_LEVEL)
CXX := g++
HOST := app.exe
RS_TARGET := $(TEMP_DIR)/dse/candidate_0/exported/$(KERNEL_NAME).xo
TIMING_RPT := impl_1_hw_bb_locked_timing_summary_routed.rpt
RS_TARGET := $(TEMP_DIR)/dse/candidate_0/vitis_run_hw/$(KERNEL_NAME)_$(PLATFORM).xclbin
TAPA_XO := $(CURDIR)/design/digit_recognizer.xo
BUILD_LOG := $(TEMP_DIR)/build.json
SUCCESS := "Build Successful"
TIMING_RPT := impl_1_hw_bb_locked_timing_summary_routed.rpt
SLACK_GETTER := $(ROOT_DIR)/common/util/get_slack.py
BUILD_LOG := $(TEMP_DIR)/build.json
RSXX := python3
RSPATH := $(CURDIR)
RSXX := rapidstream
RSPYTHON := rapidstream
DEVICE_CONFIG := $(TEMP_DIR)/device.json

all: $(RS_KERNEL_XCLBIN)
$(RSXX) $(SLACK_GETTER) -d $(TEMP_DIR) -i $(TIMING_RPT) -o $(BUILD_LOG) -c clk_kernel_00_unbuffered_net -p 3.333
echo $(SUCCESS)

$(RS_KERNEL_XCLBIN):$(SRC_DIR)/$(KERNEL_NAME).xo
mkdir -p $(TEMP_DIR)
$(RSXX) $(RS_SCRIPT)


sw_emu: $(KERNEL_XCLBIN) $(HOST)
XCL_EMULATION_MODE=sw_emu ./app.exe $<
all: $(RS_TARGET)
cd $(RSPATH) && $(RSPYTHON) $(SLACK_GETTER) -d $(TEMP_DIR) -i $(TIMING_RPT) -o $(BUILD_LOG) -c clk_kernel_00_unbuffered_net -p 3.333
@echo $(SUCCESS)

xo:$(KERNEL_XO)

$(KERNEL_XO): $(SRC_DIR)/$(KERNEL_NAME).cpp
tapac -o $@ $< \
--part-num $(PART_NUM) \
--clock-period 3.33 \
--top $(KERNEL_NAME) \
--work-dir $(TEMP_DIR)

csim:$(SRC_DIR)/*.cpp
$(RS_TARGET):$(TAPA_XO) $(DEVICE_CONFIG)
mkdir -p $(TEMP_DIR)
cd $(RSPATH) && $(RSXX)-tapaopt \
--work-dir $(TEMP_DIR) \
--tapa-xo-path $< \
--device-config $(DEVICE_CONFIG) \
--floorplan-config $(AB_CONFIG) \
--single-reg \
--run-impl \
--implementation-config $(IMPL_CONFIG) \
--connectivity-ini $(LINK_CONFIG)

$(DEVICE_CONFIG):$(AB_CONFIG)
mkdir -p $(TEMP_DIR)
$(CXX) $(INCLUDE) -o $(TEMP_DIR)/main.exe -O2 $^ -ltapa -lfrt -lglog -lgflags -lOpenCL
$(TEMP_DIR)/main.exe
cd $(RSPATH) && $(RSPYTHON) $(RS_SCRIPT)

show_groups:
rapidstream $(GRP_UTIL) -i $(TEMP_DIR)/passes/0-imported.json \
-o $(TEMP_DIR)/module_types.csv

m=$(shell date)

git:clean
git add .
git commit -m "$(m)"

clean:
rm -rf $(TEMP_DIR) *.log
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13 changes: 13 additions & 0 deletions benchmarks/tapa_flow/digit_recognizer/design/config/ab_u55c.json
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@@ -0,0 +1,13 @@
{
"dse_range_max": 0.8,
"dse_range_min": 0.7,
"partition_strategy": "flat",
"port_pre_assignments": {
".*mem_in1.*": "HBM[0]",
".*mem_out_.*": "HBM[0]",
"ap_clk": "CLK_RST",
"ap_rst_n": "CLK_RST",
"interrupt": "CLK_RST",
"s_axi_control_.*": "S_AXI_CONTROL"
}
}
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@@ -0,0 +1,7 @@
{
"max_workers": 2,
"port_to_clock_period": {
"ap_clk": 3.33
},
"vitis_platform": "xilinx_u55c_gen3x16_xdma_3_202210_1"
}
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@@ -0,0 +1,3 @@
[connectivity]
sp=digit_recognizer.mem_in1:HBM[0]
sp=digit_recognizer.mem_out:HBM[0]
Binary file modified benchmarks/tapa_flow/digit_recognizer/design/digit_recognizer.xo
Binary file not shown.
9 changes: 9 additions & 0 deletions benchmarks/tapa_flow/digit_recognizer/design/run_tapa.sh
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@@ -0,0 +1,9 @@
WORK_DIR=work.out

tapa compile \
--top digit_recognizer \
--part-num xcu55c-fsvh2892-2L-e \
--clock-period 3.33 \
-o ${WORK_DIR}/digit_recognizer.xo \
-f digit_recognizer.cpp \
2>&1 | tee tapa.log
22 changes: 22 additions & 0 deletions benchmarks/tapa_flow/digit_recognizer/run_u55c.py
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@@ -0,0 +1,22 @@
__copyright__ = """
Copyright (c) 2024 RapidStream Design Automation, Inc. and contributors. All rights reserved.
The contributor(s) of this file has/have agreed to the RapidStream Contributor License Agreement.
"""

from pathlib import Path
from rapidstream import get_u55c_vitis_device_factory

CUR_DIR = Path(__file__).parent
CUR_FILE = Path(__file__).name

VITIS_PLATFORM = (
"xilinx_u55c_gen3x16_xdma_3_202210_1" # "xilinx_u280_gen3x16_xdma_1_202211_1"
)

factory = get_u55c_vitis_device_factory(VITIS_PLATFORM)

factory.reduce_slot_area(1, 0, lut=50000, ff=60000)
factory.reduce_slot_area(0, 0, lut=50000, ff=60000)
factory.reduce_slot_area(1, 1, dsp=100)

factory.generate_virtual_device(Path(f"{CUR_DIR}/build/{CUR_FILE}/device.json"))
8 changes: 6 additions & 2 deletions benchmarks/tapa_flow/knn_chipknn/k2D_float_8PEs/Makefile
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Expand Up @@ -21,7 +21,7 @@ DEVICE_CONFIG := $(TEMP_DIR)/device.json
DEVICE_GEN := $(CURDIR)/gen_device.py

all: $(RS_TARGET)
$(RSXX) $(SLACK_GETTER) -d $(TEMP_DIR) -i $(TIMING_RPT) -o $(BUILD_LOG) -c clk_kernel_00_unbuffered_net -p 3.333
cd $(RSPATH) && $(RSPYTHON) $(SLACK_GETTER) -d $(TEMP_DIR) -i $(TIMING_RPT) -o $(BUILD_LOG) -c clk_kernel_00_unbuffered_net -p 3.333
@echo $(SUCCESS)

$(RS_TARGET):$(TAPA_XO) $(DEVICE_CONFIG)
Expand All @@ -30,7 +30,11 @@ $(RS_TARGET):$(TAPA_XO) $(DEVICE_CONFIG)
--work-dir $(TEMP_DIR) \
--tapa-xo-path $< \
--device-config $(DEVICE_CONFIG) \
--floorplan-config $(AB_CONFIG)
--floorplan-config $(AB_CONFIG) \
--single-reg \
--run-impl \
--implementation-config $(CURDIR)/design/config/impl_config.json \
--connectivity-ini $(CURDIR)/design/config/link_config.ini

$(DEVICE_CONFIG):$(AB_CONFIG)
mkdir -p $(TEMP_DIR)
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@@ -0,0 +1,7 @@
{
"max_workers": 2,
"port_to_clock_period": {
"ap_clk": 3.33
},
"vitis_platform": "xilinx_u55c_gen3x16_xdma_3_202210_1"
}
13 changes: 8 additions & 5 deletions regression_test.sh
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Expand Up @@ -13,21 +13,23 @@

# Rapidstream command path
#RSXX="rapidstream"
RSXX="cd /home/vagrantxiao24/ws_222/rapidstream_worktree/rapidstream && poetry run python"
RSPATH="/home/vagrantxiao24/ws_222/rapidstream_worktree/rapidstream"
RSPYTHON="poetry run python"
RSXX="poetry run rapidstream"
CLEAN_TEST="clean_test"
NOCLEAN_TEST="no_clean_test"

single_make_test(){
app=$1
rs_script=${app}/$2
ab_config=${app}/design/config/$2
mode=$3
echo "Testing ${app}"
cd ${app}
if [ "${mode}" = "${CLEAN_TEST}" ]; then
echo "Will clean metadata for ${app}"
make RS_SCRIPT=${rs_script} clean
make AB_CONFIG=${ab_config} clean
fi
make RSXX="${RSXX}" RS_SCRIPT=${rs_script} all
make RSPATH="${RSPATH}" RSPYTHON="${RSPYTHON}" RSXX="${RSXX}" AB_CONFIG="${ab_config}" all
cd -
}

Expand All @@ -48,7 +50,8 @@ VITIS_DIR="${GIT_ROOT}/benchmarks/vitis_flow"

#single_make_test "${TAPA_DIR}/knn_chipknn/k2D_float_15PEs" "run.py" ${CLEAN_TEST}
#single_make_test "${TAPA_DIR}/knn_chipknn/k16D_float_27PEs" "run.py" ${CLEAN_TEST}
single_make_test "${TAPA_DIR}/knn_chipknn/k64D_8bit_30PEs" "run.py" ${CLEAN_TEST}
#single_make_test "${TAPA_DIR}/knn_chipknn/k64D_8bit_30PEs" "run.py" ${CLEAN_TEST}
single_make_test "${TAPA_DIR}/knn_chipknn/k2D_float_8PEs" "ab_config.json" ${CLEAN_TEST}

#single_make_test "${TAPA_DIR}/digit_recognizer" "run.py" ${CLEAN_TEST} &
#single_make_test "${TAPA_DIR}/digit_recognizer" "run_u280_x0y0_x1y0.py" ${NOCLEAN_TEST} &
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