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Lean: omit type abbreviations and leave a comment instead #983

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Lean: omit type abbreviations and leave a comment instead #983

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3 changes: 1 addition & 2 deletions src/sail_lean_backend/pretty_print_lean.ml
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Expand Up @@ -618,8 +618,7 @@ let doc_typdef ctx (TD_aux (td, tannot) as full_typdef) =
| _ -> [string "structure"; string id; separate space rectyp; string "where"]
in
doc_typ_quant_in_comment ctx tq ^^ hardline ^^ nest 2 (flow (break 1) decl_start ^^ hardline ^^ fields_doc)
| TD_abbrev (Id_aux (Id id, _), tq, A_aux (A_typ t, _)) ->
nest 2 (flow (break 1) [string "abbrev"; string id; coloneq; doc_typ ctx t])
| TD_abbrev (id, tq, A_aux (A_typ t, _)) -> string "/- Type abbreviation omitted: " ^^ doc_id_ctor id ^^ string " -/"
| TD_abbrev (Id_aux (Id id, _), tq, A_aux (A_nexp ne, _)) ->
nest 2 (flow (break 1) [string "abbrev"; string id; colon; string "Int"; coloneq; doc_nexp ctx ne])
| TD_variant (Id_aux (Id id, _), tq, ar, _) ->
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2 changes: 1 addition & 1 deletion test/lean/bitfield.expected.lean
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Expand Up @@ -2,7 +2,7 @@ import Out.Sail.Sail

open Sail

abbrev cr_type := (BitVec 8)
/- Type abbreviation omitted: cr_type -/

inductive Register : Type where
| R
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2 changes: 1 addition & 1 deletion test/lean/register_vector.expected.lean
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Expand Up @@ -2,7 +2,7 @@ import Out.Sail.Sail

open Sail

abbrev reg_index := Nat
/- Type abbreviation omitted: reg_index -/

inductive Register : Type where
| R0
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4 changes: 3 additions & 1 deletion test/lean/typedef.expected.lean
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Expand Up @@ -6,7 +6,9 @@ abbrev xlen : Int := 64

abbrev xlen_bytes : Int := 8

abbrev xlenbits := (BitVec 64)
/- Type abbreviation omitted: xlenbits -/

/- Type abbreviation omitted: bits2 -/

abbrev SailM := PreSailM PEmpty.elim trivialChoiceSource

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2 changes: 2 additions & 0 deletions test/lean/typedef.sail
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Expand Up @@ -11,3 +11,5 @@ function EXTZ(m, v) = sail_zero_extend(v, m)
val EXTS : forall 'n 'm, 'm >= 'n. (implicit('m), bits('n)) -> bits('m)
function EXTS(m, v) = sail_sign_extend(v, m)

type bits2('n) = bitvector('n)

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