Merge pull request #193 from ved-rivos/1205_1

Add description of exceptions to CSRs

cfi_backward.adoc

@@ -164,6 +164,7 @@ less than M:
 * 16-bit Zicfiss instructions will revert to their behavior as defined by Zcmop.
 * The `pte.xwr=010b` encoding in VS/S-stage page tables becomes reserved.
 * The `henvcfg.SSE` and `senvcfg.SSE` fields will read as zero and are read-only.
+* `SSAMOSWAP.W/D` raises an illegal-instruction exception.
 
 ==== Supervisor Environment Configuration Register (`senvcfg`)
 
@@ -188,6 +189,8 @@ the following rules apply:
 
 * 32-bit Zicfiss instructions will revert to their behavior as defined by Zimop.
 * 16-bit Zicfiss instructions will revert to their behavior as defined by Zcmop.
+* When `menvcfg.SSE` is one, `SSAMOSWAP.W/D` raises an illegal-instruction
+  exception in U-mode and a virtual instruction exception in VU-mode.
 
 <<<
 
@@ -219,6 +222,8 @@ the following rules apply when `V=1`:
 * 16-bit Zicfiss instructions will revert to their behavior as defined by Zcmop.
 * The `pte.xwr=010b` encoding in VS-stage page tables becomes reserved.
 * The `senvcfg.SSE` field will read as zero and is read-only.
+* When `menvcfg.SSE` is one, `SSAMOSWAP.W/D` raises a virtual instruction
+  exception.
 
 ==== Shadow Stack Pointer (`ssp`)