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CSR stopei/mtopei: Supervisor/Machine top external interrupt (#9)
Implement external interrupt CSRs stopei/mtopei: - stopei: Supervisor top external interrupt - mtopei: Machine top external interrupt These CSRs are specified in the RISC-V Advanced Interrupt Architecture (AIA) (https://github.com/riscv/riscv-aia/releases).
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Original file line number | Diff line number | Diff line change |
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//! mtopei register | ||
//! | ||
//! The `mtopei` CSR is defined in "The RISC-V Advanced Interrupt | ||
//! Architecture" Version 0.3.2-draft | ||
//! | ||
//! The primary interface to the mtopei CSR should be the `claim()` | ||
//! function, which will atomically claim the highest-priority pending | ||
//! interrupt and allow the interrupt handler to process it. | ||
use bit_field::BitField; | ||
|
||
/// mtopei register | ||
#[derive(Clone, Copy, Debug)] | ||
pub struct Mtopei { | ||
bits: usize, | ||
} | ||
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||
impl Mtopei { | ||
/// Returns the contents of the register as raw bits | ||
#[inline] | ||
pub fn bits(&self) -> usize { | ||
self.bits | ||
} | ||
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||
/// Interrupt identity | ||
#[inline] | ||
pub fn identity(&self) -> usize { | ||
self.bits.get_bits(16..26) | ||
} | ||
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||
/// Interrupt priority | ||
#[inline] | ||
pub fn priority(&self) -> usize { | ||
self.bits.get_bits(0..10) | ||
} | ||
} | ||
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read_csr_as!(Mtopei, 0x35C); | ||
claim_csr_as!(Mtopei, 0x35C); |
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Original file line number | Diff line number | Diff line change |
---|---|---|
@@ -0,0 +1,39 @@ | ||
//! stopei register | ||
//! | ||
//! The `stopei` CSR is defined in "The RISC-V Advanced Interrupt | ||
//! Architecture" Version 0.3.2-draft | ||
//! | ||
//! The primary interface to the stopei CSR should be the `claim()` | ||
//! function, which will atomically claim the highest-priority pending | ||
//! interrupt and allow the interrupt handler to process it. | ||
use bit_field::BitField; | ||
|
||
/// stopei register | ||
#[derive(Clone, Copy, Debug)] | ||
pub struct Stopei { | ||
bits: usize, | ||
} | ||
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||
impl Stopei { | ||
/// Returns the contents of the register as raw bits | ||
#[inline] | ||
pub fn bits(&self) -> usize { | ||
self.bits | ||
} | ||
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||
/// Interrupt identity | ||
#[inline] | ||
pub fn identity(&self) -> usize { | ||
self.bits.get_bits(16..26) | ||
} | ||
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||
/// Interrupt priority | ||
#[inline] | ||
pub fn priority(&self) -> usize { | ||
self.bits.get_bits(0..10) | ||
} | ||
} | ||
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||
read_csr_as!(Stopei, 0x15C); | ||
claim_csr_as!(Stopei, 0x15C); |