Skip to content

Commit

Permalink
Merge pull request #7 from rivosinc/dev/PingTakPeterTang/hyperbolics
Browse files Browse the repository at this point in the history
added sinh/cosh/tanh functions using mixed floating-point/fixed-point…
  • Loading branch information
PingTakPeterTang authored Dec 22, 2023
2 parents 69e0f69 + b359d98 commit 67a9427
Show file tree
Hide file tree
Showing 18 changed files with 951 additions and 8 deletions.
6 changes: 6 additions & 0 deletions CMakeLists.txt
Original file line number Diff line number Diff line change
Expand Up @@ -43,6 +43,12 @@ set(PROJECT_SOURCES
${CMAKE_CURRENT_SOURCE_DIR}/src/rvvlm_tanDI.c
${CMAKE_CURRENT_SOURCE_DIR}/src/rvvlm_tanpiD.c
${CMAKE_CURRENT_SOURCE_DIR}/src/rvvlm_tanpiDI.c
${CMAKE_CURRENT_SOURCE_DIR}/src/rvvlm_coshD.c
${CMAKE_CURRENT_SOURCE_DIR}/src/rvvlm_coshDI.c
${CMAKE_CURRENT_SOURCE_DIR}/src/rvvlm_sinhD.c
${CMAKE_CURRENT_SOURCE_DIR}/src/rvvlm_sinhDI.c
${CMAKE_CURRENT_SOURCE_DIR}/src/rvvlm_tanhD.c
${CMAKE_CURRENT_SOURCE_DIR}/src/rvvlm_tanhDI.c
)

add_library(vecm
Expand Down
45 changes: 45 additions & 0 deletions include/rvvlm.h
Original file line number Diff line number Diff line change
Expand Up @@ -262,6 +262,31 @@ union sui64_fp64 {
#define RVVLM_TANPIDI_VSET_CONFIG "rvvlm_fp64m2.h"
#define RVVLM_TANPIDI_MERGED rvvlm_tanpiI

// FP64 cosh function configuration
#define RVVLM_COSHD_VSET_CONFIG "rvvlm_fp64m2.h"
#define RVVLM_COSHD_STD rvvlm_coshD_std
#define RVVLM_COSHD_MIXED rvvlm_cosh

#define RVVLM_COSHDI_VSET_CONFIG "rvvlm_fp64m2.h"
#define RVVLM_COSHDI_STD rvvlm_coshI
#define RVVLM_COSHDI_MIXED rvvlm_coshDI_mixed

// FP64 sinh function configuration
#define RVVLM_SINHD_VSET_CONFIG "rvvlm_fp64m2.h"
#define RVVLM_SINHD_STD rvvlm_sinhD_std
#define RVVLM_SINHD_MIXED rvvlm_sinh

#define RVVLM_SINHDI_VSET_CONFIG "rvvlm_fp64m2.h"
#define RVVLM_SINHDI_STD rvvlm_sinhI
#define RVVLM_SINHDI_MIXED rvvlm_sinhDI_mixed

// FP64 tanh function configuration
#define RVVLM_TANHD_VSET_CONFIG "rvvlm_fp64m2.h"
#define RVVLM_TANHD_STD rvvlm_tanh

#define RVVLM_TANHDI_VSET_CONFIG "rvvlm_fp64m2.h"
#define RVVLM_TANHDI_STD rvvlm_tanhI

// Define the various tables for table-driven implementations
extern int64_t expD_tbl64_fixedpt[64];
extern int64_t logD_tbl128_fixedpt[128];
Expand Down Expand Up @@ -366,6 +391,26 @@ void RVVLM_TANPID_MERGED(size_t x_len, const double *x, double *y);
void RVVLM_TANPIDI_MERGED(size_t x_len, const double *x, size_t stride_x,
double *y, size_t stride_y);

void RVVLM_COSHD_STD(size_t x_len, const double *x, double *y);
void RVVLM_COSHDI_STD(size_t x_len, const double *x, size_t stride_x, double *y,
size_t stride_y);

void RVVLM_COSHD_MIXED(size_t x_len, const double *x, double *y);
void RVVLM_COSHDI_MIXED(size_t x_len, const double *x, size_t stride_x,
double *y, size_t stride_y);

void RVVLM_SINHD_STD(size_t x_len, const double *x, double *y);
void RVVLM_SINHDI_STD(size_t x_len, const double *x, size_t stride_x, double *y,
size_t stride_y);

void RVVLM_SINHD_MIXED(size_t x_len, const double *x, double *y);
void RVVLM_SINHDI_MIXED(size_t x_len, const double *x, size_t stride_x,
double *y, size_t stride_y);

void RVVLM_TANHD_STD(size_t x_len, const double *x, double *y);
void RVVLM_TANHDI_STD(size_t x_len, const double *x, size_t stride_x, double *y,
size_t stride_y);

#ifdef __cplusplus
}
#endif
61 changes: 61 additions & 0 deletions include/rvvlm_hyperbolicsD.h
Original file line number Diff line number Diff line change
@@ -0,0 +1,61 @@
// SPDX-FileCopyrightText: 2023 Rivos Inc.
//
// SPDX-License-Identifier: Apache-2.0

#if defined(COMPILE_FOR_SINH) || defined(COMPILE_FOR_TANH)
#define GEN_EXCEPTIONS(special_args, vx, vlen) \
__riscv_vfmadd((special_args), (vx), 0x1.0p-60, (vx), (vlen))
#else
#define GEN_EXCEPTIONS(special_args, vx, vlen) \
__riscv_vfmadd((special_args), (vx), (vx), VFMV_VF(0x1.0p0, (vlen)), (vlen))
#endif

#if defined(COMPILE_FOR_SINH) || defined(COMPILE_FOR_COSH)
#define EXCEPTION_HANDLING_HYPER(vx, expo_x, special_args, vy_special, vlen) \
do { \
VUINT vclass = __riscv_vfclass((vx), (vlen)); \
VBOOL NaN_Inf; \
IDENTIFY(vclass, class_NaN | class_Inf, NaN_Inf, (vlen)); \
VBOOL small_x = __riscv_vmsleu((expo_x), EXP_BIAS - MAN_LEN - 5, (vlen)); \
(special_args) = __riscv_vmor(NaN_Inf, small_x, (vlen)); \
UINT nb_special_args = __riscv_vcpop((special_args), (vlen)); \
if (nb_special_args > 0) { \
(vy_special) = GEN_EXCEPTIONS((special_args), (vx), (vlen)); \
(vx) = __riscv_vfmerge((vx), fp_posZero, (special_args), (vlen)); \
} \
} while (0)
#else
#define EXCEPTION_HANDLING_HYPER(vx, expo_x, special_args, vy_special, vlen) \
do { \
VUINT vclass = __riscv_vfclass((vx), (vlen)); \
VBOOL NaN_Inf; \
IDENTIFY(vclass, class_NaN | class_Inf, NaN_Inf, (vlen)); \
VBOOL small_x = __riscv_vmsleu((expo_x), EXP_BIAS - MAN_LEN - 5, (vlen)); \
(special_args) = __riscv_vmor(NaN_Inf, small_x, (vlen)); \
UINT nb_special_args = __riscv_vcpop((special_args), (vlen)); \
if (nb_special_args > 0) { \
(vy_special) = GEN_EXCEPTIONS((special_args), (vx), (vlen)); \
VBOOL Inf; \
IDENTIFY(vclass, class_Inf, Inf, (vlen)); \
VFLOAT one = VFMV_VF(fp_posOne, (vlen)); \
one = __riscv_vfsgnj(one, (vx), (vlen)); \
(vy_special) = __riscv_vmerge((vy_special), one, Inf, (vlen)); \
(vx) = __riscv_vfmerge((vx), fp_posZero, (special_args), (vlen)); \
} \
} while (0)
#endif

#define LOG2_INV 0x1.71547652b82fep+0
#define LOG2_HI 0x1.62e42fefa39efp-1
#define LOG2_LO 0x1.abc9e3b39803fp-56

#define ARGUMENT_REDUCTION(vx, n, r, r_delta, vlen) \
do { \
VFLOAT n_flt = __riscv_vfmul((vx), LOG2_INV, (vlen)); \
(n) = __riscv_vfcvt_x(n_flt, (vlen)); \
n_flt = __riscv_vfcvt_f((n), (vlen)); \
(r_delta) = __riscv_vfnmsac((vx), LOG2_HI, n_flt, (vlen)); \
(r) = __riscv_vfnmsac((r_delta), LOG2_LO, n_flt, (vlen)); \
(r_delta) = __riscv_vfsub((r_delta), (r), (vlen)); \
(r_delta) = __riscv_vfnmsac((r_delta), LOG2_LO, n_flt, (vlen)); \
} while (0)
Loading

0 comments on commit 67a9427

Please sign in to comment.