Merge #24

24: Bump to v0.2.3 r=robamu a=robamu - Added API to reset peripherals - Improved API of timer. - Separation of TIM reg and TIM pin interface Co-authored-by: Robin Mueller <robin.mueller.m@gmail.com>
robamu-org · Dec 5, 2021 · 54e016f · 54e016f
2 parents dd7d29e + e3e978e
commit 54e016f
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diff --git a/CHANGELOG.md b/CHANGELOG.md
@@ -6,12 +6,17 @@ All notable changes to this project will be documented in this file.
 The format is based on [Keep a Changelog](http://keepachangelog.com/)
 and this project adheres to [Semantic Versioning](http://semver.org/).
 
-## [unreleased]
+## [0.2.3]
 
 ### Added
 
 - Basic API for EDAC functionality
 - PWM implementation and example
+- API to perform peripheral resets
+
+### Changed
+
+- Improved Timer API. It is now possible to simply use `new` on `CountDownTimer`
 
 ## [0.2.2]
 

diff --git a/Cargo.toml b/Cargo.toml
@@ -1,6 +1,6 @@
 [package]
 name = "va108xx-hal"
-version = "0.2.2"
+version = "0.2.3"
 authors = ["Robin Mueller <robin.mueller.m@gmail.com>"]
 edition = "2021"
 description = "HAL for the Vorago VA108xx family of microcontrollers"

diff --git a/examples/spi.rs b/examples/spi.rs
@@ -139,7 +139,7 @@ fn main() -> ! {
     }
 
     // Application logic
-    let mut delay_tim = CountDownTimer::tim1(&mut dp.SYSCONFIG, 50.mhz().into(), dp.TIM1);
+    let mut delay_tim = CountDownTimer::new(&mut dp.SYSCONFIG, 50.mhz().into(), dp.TIM1);
     loop {
         match SPI_BUS_SEL {
             SpiBusSelect::SpiAPortA | SpiBusSelect::SpiAPortB => {

diff --git a/examples/tests.rs b/examples/tests.rs
@@ -163,7 +163,7 @@ fn main() -> ! {
                 delay.delay_ms(500);
             }
 
-            let mut delay_timer = CountDownTimer::tim1(&mut dp.SYSCONFIG, 50.mhz().into(), dp.TIM1);
+            let mut delay_timer = CountDownTimer::new(&mut dp.SYSCONFIG, 50.mhz().into(), dp.TIM1);
             let mut pa0 = pinsa.pa0.into_push_pull_output();
             for _ in 0..5 {
                 led1.toggle().ok();

diff --git a/examples/timer-ticks.rs b/examples/timer-ticks.rs
@@ -72,7 +72,7 @@ fn main() -> ! {
                 interrupt::OC0,
             );
             let mut second_timer =
-                CountDownTimer::tim1(&mut dp.SYSCONFIG, get_sys_clock().unwrap(), dp.TIM1);
+                CountDownTimer::new(&mut dp.SYSCONFIG, get_sys_clock().unwrap(), dp.TIM1);
             second_timer.listen(
                 Event::TimeOut,
                 &mut dp.SYSCONFIG,

diff --git a/src/clock.rs b/src/clock.rs
@@ -2,28 +2,14 @@
 //!
 //! This also includes functionality to enable the peripheral clocks
 use crate::time::Hertz;
+use crate::utility::PeripheralSelect;
 use cortex_m::interrupt::{self, Mutex};
 use once_cell::unsync::OnceCell;
 use va108xx::SYSCONFIG;
 
 static SYS_CLOCK: Mutex<OnceCell<Hertz>> = Mutex::new(OnceCell::new());
 
-#[derive(Copy, Clone, PartialEq)]
-pub enum PeripheralClocks {
-    PortA = 0,
-    PortB = 1,
-    Spi0 = 4,
-    Spi1 = 5,
-    Spi2 = 6,
-    Uart0 = 8,
-    Uart1 = 9,
-    I2c0 = 16,
-    I2c1 = 17,
-    Irqsel = 21,
-    Ioconfig = 22,
-    Utility = 23,
-    Gpio = 24,
-}
+pub type PeripheralClocks = PeripheralSelect;
 
 #[derive(Debug, PartialEq)]
 pub enum FilterClkSel {

diff --git a/src/pwm.rs b/src/pwm.rs
@@ -41,15 +41,15 @@ macro_rules! pwm_common_func {
         #[inline]
         fn enable_pwm_a(&mut self) {
             self.reg
-                .get_reg_block()
+                .reg()
                 .ctrl
                 .modify(|_, w| unsafe { w.status_sel().bits(StatusSelPwm::PwmA as u8) });
         }
 
         #[inline]
         fn enable_pwm_b(&mut self) {
             self.reg
-                .get_reg_block()
+                .reg()
                 .ctrl
                 .modify(|_, w| unsafe { w.status_sel().bits(StatusSelPwm::PwmB as u8) });
         }
@@ -69,7 +69,7 @@ macro_rules! pwm_common_func {
             self.pwm_base.current_rst_val =
                 self.pwm_base.sys_clk.0 / self.pwm_base.current_period.0;
             self.reg
-                .get_reg_block()
+                .reg()
                 .rst_value
                 .write(|w| unsafe { w.bits(self.pwm_base.current_rst_val) });
         }
@@ -98,7 +98,7 @@ macro_rules! pwmb_func {
                 * self.pwm_base.current_lower_limit as u64)
                 / DUTY_MAX as u64;
             self.reg
-                .get_reg_block()
+                .reg()
                 .pwmb_value
                 .write(|w| unsafe { w.bits(pwmb_val as u32) });
         }
@@ -115,7 +115,7 @@ macro_rules! pwmb_func {
                 * self.pwm_base.current_duty as u64)
                 / DUTY_MAX as u64;
             self.reg
-                .get_reg_block()
+                .reg()
                 .pwma_value()
                 .write(|w| unsafe { w.bits(pwma_val as u32) });
         }
@@ -127,7 +127,7 @@ macro_rules! pwmb_func {
 //==================================================================================================
 
 pub struct PwmPin<PIN: TimPin, TIM: ValidTim, MODE = PWMA> {
-    reg: TimRegister<PIN, TIM>,
+    reg: TimAndPinRegister<PIN, TIM>,
     pwm_base: PwmBase,
     _mode: PhantomData<MODE>,
 }
@@ -151,7 +151,7 @@ where
                 current_rst_val: 0,
                 sys_clk: sys_clk.into(),
             },
-            reg: unsafe { TimRegister::new(vtp.0, vtp.1) },
+            reg: unsafe { TimAndPinRegister::new(vtp.0, vtp.1) },
             _mode: PhantomData,
         };
         enable_peripheral_clock(sys_cfg, crate::clock::PeripheralClocks::Gpio);
@@ -308,18 +308,12 @@ macro_rules! pwm_pin_impl {
     () => {
         #[inline]
         fn disable(&mut self) {
-            self.reg
-                .get_reg_block()
-                .ctrl
-                .modify(|_, w| w.enable().clear_bit());
+            self.reg.reg().ctrl.modify(|_, w| w.enable().clear_bit());
         }
 
         #[inline]
         fn enable(&mut self) {
-            self.reg
-                .get_reg_block()
-                .ctrl
-                .modify(|_, w| w.enable().set_bit());
+            self.reg.reg().ctrl.modify(|_, w| w.enable().set_bit());
         }
 
         #[inline]
@@ -329,7 +323,7 @@ macro_rules! pwm_pin_impl {
                 * (DUTY_MAX as u64 - self.pwm_base.current_duty as u64))
                 / DUTY_MAX as u64;
             self.reg
-                .get_reg_block()
+                .reg()
                 .pwma_value()
                 .write(|w| unsafe { w.bits(pwma_val as u32) });
         }
@@ -350,18 +344,12 @@ macro_rules! pwm_impl {
     () => {
         #[inline]
         fn disable(&mut self, _channel: Self::Channel) {
-            self.reg
-                .get_reg_block()
-                .ctrl
-                .modify(|_, w| w.enable().clear_bit());
+            self.reg.reg().ctrl.modify(|_, w| w.enable().clear_bit());
         }
 
         #[inline]
         fn enable(&mut self, _channel: Self::Channel) {
-            self.reg
-                .get_reg_block()
-                .ctrl
-                .modify(|_, w| w.enable().set_bit());
+            self.reg.reg().ctrl.modify(|_, w| w.enable().set_bit());
         }
 
         #[inline]
@@ -376,7 +364,7 @@ macro_rules! pwm_impl {
                 * (DUTY_MAX as u64 - self.pwm_base.current_duty as u64))
                 / DUTY_MAX as u64;
             self.reg
-                .get_reg_block()
+                .reg()
                 .pwma_value()
                 .write(|w| unsafe { w.bits(pwma_val as u32) });
         }
@@ -393,7 +381,7 @@ macro_rules! pwm_impl {
             }
             self.pwm_base.current_rst_val =
                 self.pwm_base.sys_clk.0 / self.pwm_base.current_period.0;
-            let reg_block = self.reg.get_reg_block();
+            let reg_block = self.reg.reg();
             reg_block
                 .rst_value
                 .write(|w| unsafe { w.bits(self.pwm_base.current_rst_val) });