sim_fpga

Building simulators with verilator

In this project we build hardware simulators using Verilator. The project includes verilog RTL designs that implements a pixel processor.

In addition the verilated design is linked againts the popular ImGui to create a simulation tool with a graphic UI.

Dependencies

To build the simulator you need:

1. C++ compiler
2. Verilator: https://verilator.org/guide/latest/install.html

To regenerate the rtl design from the SpinalHDL sources you will need also sbt.

Build the simulator

$> cd sim
$> make

Rebuild RTL design

$> sbt "runMain jderobot.TopPixelProcessor"

Run the simulator

sim/obj_dir/VTopPixelProcessor

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Tutorial

In tutorial there are some examples with more information on how to use Verilator with ImGui

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Example 6

Test the processing modules of:

FPGA-robotics/Projects/ComputerVision/ulx3s/apio/ov7670x3_vga160x120_spipan/

Tested modules are inside the blue area: