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feat: improve code style, add documentations #25

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9 changes: 8 additions & 1 deletion uart_xilinx/src/uart_lite/registers.rs
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Original file line number Diff line number Diff line change
@@ -1,10 +1,17 @@
use volatile_register::{RO, WO};

/// # UART Registers
/// UART Lite register block.
///
/// It consists of a control register, a status register, and a pair of
/// transmit/receive FIFOs.
#[repr(C)]
pub struct Registers {
/// Receive data first-in first-out (FIFO) queue register.
pub rx: RO<u32>,
/// Transmit data first-in first-out (FIFO) queue register.
pub tx: WO<u32>,
/// Status register.
pub stat: RO<u32>,
/// Control register.
pub ctrl: WO<u32>,
}
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