Skip to content
New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

Sign up for GitHub

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

Jump to bottom

do simulation and HW build with LLVM on RISCV #173

Merged
merged 1 commit into from
Jan 11, 2024
+2 −9

do simulation and HW build with LLVM on RISCV

3cf29a3
Select commit
Loading
Failed to load commit list.
Merged

do simulation and HW build with LLVM on RISCV #173

do simulation and HW build with LLVM on RISCV
3cf29a3
Select commit
Loading
Failed to load commit list.
DCO / DCO succeeded Jan 11, 2024 in 1s

DCO

All commits are signed off!

View more details on DCO