v0.1.5

MANIFEST.in

@@ -1 +1 @@
-include svreal.sv
+include svreal/svreal.sv

setup.py

@@ -1,7 +1,7 @@
 from setuptools import setup
 
 name = 'svreal'
-version = '0.1.4'
+version = '0.1.5'
 
 DESCRIPTION = '''\
 Library for working with fixed-point numbers in SystemVerilog\

svreal/__init__.py

@@ -1 +1,6 @@
-from .files import get_svreal_header
+from pathlib import Path
+
+PACK_DIR = Path(__file__).resolve().parent
+
+def get_svreal_header():
+    return PACK_DIR / 'svreal.sv'

tests/common.py

@@ -5,6 +5,22 @@
 # AHA imports
 from fault.subprocess_run import subprocess_run
 
+TEST_DIR = Path(__file__).resolve().parent
+
+def get_file(path):
+    return Path(TEST_DIR, path)
+
+def get_dir(path):
+    # alias for get_file
+    return get_file(path)
+
+def get_files(*args):
+    return [get_file(path) for path in args]
+
+def get_dirs(*args):
+    # alias for get_files
+    return get_files(*args)
+
 def pytest_sim_params(metafunc, simulators=None):
     if simulators is None:
         simulators = ['vcs', 'vivado', 'ncsim', 'iverilog']

tests/test_arith.py

@@ -3,8 +3,8 @@
 import fault
 
 # svreal imports
-from .common import pytest_sim_params
-from svreal.files import get_file, get_svreal_header
+from .common import pytest_sim_params, get_file
+from svreal import get_svreal_header
 
 def pytest_generate_tests(metafunc):
     pytest_sim_params(metafunc)
@@ -70,9 +70,9 @@ def run_iteration(a_i, b_i):
     tester.compile_and_run(
         target='system-verilog',
         simulator=simulator,
-        ext_srcs=[get_file('tests/test_arith.sv')],
+        ext_srcs=[get_file('test_arith.sv')],
         inc_dirs=[get_svreal_header().parent],
         defines=defines,
         ext_model_file=True,
         tmp_dir=True
-    )
+    )

tests/test_clog2.py

@@ -6,8 +6,8 @@
 import fault
 
 # svreal imports
-from .common import pytest_sim_params
-from svreal.files import get_file, get_svreal_header
+from .common import pytest_sim_params, get_file
+from svreal import get_svreal_header
 
 def pytest_generate_tests(metafunc):
     pytest_sim_params(metafunc)
@@ -49,8 +49,8 @@ def run_iteration(in_):
     tester.compile_and_run(
         target='system-verilog',
         simulator=simulator,
-        ext_srcs=[get_file('tests/test_clog2.sv')],
+        ext_srcs=[get_file('test_clog2.sv')],
         inc_dirs=[get_svreal_header().parent],
         ext_model_file=True,
         tmp_dir=True
-    )
+    )

tests/test_comp.py

@@ -3,8 +3,8 @@
 import fault
 
 # svreal imports
-from .common import pytest_sim_params
-from svreal.files import get_file, get_svreal_header
+from .common import pytest_sim_params, get_file
+from svreal import get_svreal_header
 
 def pytest_generate_tests(metafunc):
     pytest_sim_params(metafunc)
@@ -71,9 +71,9 @@ def run_iteration(a_i, b_i):
     tester.compile_and_run(
         target='system-verilog',
         simulator=simulator,
-        ext_srcs=[get_file('tests/test_comp.sv')],
+        ext_srcs=[get_file('test_comp.sv')],
         inc_dirs=[get_svreal_header().parent],
         defines=defines,
         ext_model_file=True,
         tmp_dir=True
-    )
+    )

tests/test_const.py

@@ -3,8 +3,8 @@
 import fault
 
 # svreal imports
-from .common import pytest_sim_params
-from svreal.files import get_file, get_svreal_header
+from .common import pytest_sim_params, get_file
+from svreal import get_svreal_header
 
 def pytest_generate_tests(metafunc):
     pytest_sim_params(metafunc)
@@ -55,10 +55,10 @@ def test_const(simulator, defines):
     tester.compile_and_run(
         target='system-verilog',
         simulator=simulator,
-        ext_srcs=[get_file('tests/test_const.sv')],
+        ext_srcs=[get_file('test_const.sv')],
         inc_dirs=[get_svreal_header().parent],
         defines=defines,
         parameters=parameters,
         ext_model_file=True,
         tmp_dir=True
-    )
+    )

tests/test_conv.py

@@ -6,8 +6,8 @@
 import fault
 
 # svreal imports
-from .common import pytest_sim_params
-from svreal.files import get_file, get_svreal_header
+from .common import pytest_sim_params, get_file
+from svreal import get_svreal_header
 
 def pytest_generate_tests(metafunc):
     pytest_sim_params(metafunc)
@@ -60,9 +60,9 @@ def run_iteration(r2i_i, i2r_i=0):
     tester.compile_and_run(
         target='system-verilog',
         simulator=simulator,
-        ext_srcs=[get_file('tests/test_conv.sv')],
+        ext_srcs=[get_file('test_conv.sv')],
         inc_dirs=[get_svreal_header().parent],
         defines=defines,
         ext_model_file=True,
         tmp_dir=True
-    )
+    )

tests/test_dff.py

@@ -3,8 +3,8 @@
 import fault
 
 # svreal imports
-from .common import pytest_sim_params
-from svreal.files import get_file, get_svreal_header
+from .common import pytest_sim_params, get_file
+from svreal import get_svreal_header
 
 def pytest_generate_tests(metafunc):
     pytest_sim_params(metafunc)
@@ -74,10 +74,10 @@ def test_dff(simulator, defines):
     tester.compile_and_run(
         target='system-verilog',
         simulator=simulator,
-        ext_srcs=[get_file('tests/test_dff.sv')],
+        ext_srcs=[get_file('test_dff.sv')],
         inc_dirs=[get_svreal_header().parent],
         defines=defines,
         parameters={'init': 1.23},
         ext_model_file=True,
         tmp_dir=True
-    )
+    )

tests/test_hier.py

@@ -3,8 +3,8 @@
 import fault
 
 # svreal imports
-from .common import pytest_sim_params
-from svreal.files import get_file, get_svreal_header
+from .common import pytest_sim_params, get_file
+from svreal import get_svreal_header
 
 def pytest_generate_tests(metafunc):
     pytest_sim_params(metafunc)
@@ -32,9 +32,9 @@ def test_hier(simulator, defines):
     tester.compile_and_run(
         target='system-verilog',
         simulator=simulator,
-        ext_srcs=[get_file('tests/test_hier.sv')],
+        ext_srcs=[get_file('test_hier.sv')],
         inc_dirs=[get_svreal_header().parent],
         defines=defines,
         ext_model_file=True,
         tmp_dir=True
-    )
+    )

tests/test_iface.py

@@ -3,8 +3,8 @@
 import fault
 
 # svreal imports
-from .common import pytest_sim_params
-from svreal.files import get_file, get_svreal_header
+from .common import pytest_sim_params, get_file
+from svreal import get_svreal_header
 
 def pytest_generate_tests(metafunc):
     pytest_sim_params(metafunc, simulators=['ncsim', 'vcs', 'vivado'])
@@ -35,8 +35,8 @@ def test_iface(simulator, defines):
     tester.compile_and_run(
         target='system-verilog',
         simulator=simulator,
-        ext_srcs=[get_file('tests/test_iface_core.sv'),
-                  get_file('tests/test_iface.sv')],
+        ext_srcs=[get_file('test_iface_core.sv'),
+                  get_file('test_iface.sv')],
         inc_dirs=[get_svreal_header().parent],
         defines=defines,
         ext_model_file=True,

tests/test_iface_synth.py

@@ -1,14 +1,15 @@
 # svreal imports
-from .common import pytest_synth_params, run_synth
-from svreal.files import get_file, get_dir, get_svreal_header
+from .common import pytest_synth_params, run_synth, get_file, get_dir
+from svreal import get_svreal_header
 
 def pytest_generate_tests(metafunc):
     pytest_synth_params(metafunc)
 
 def test_synth(synth):
     run_synth(synth=synth,
-              src_files=[get_file('tests/test_iface_core.sv'),
-                         get_file('tests/test_iface_synth.sv')],
+              src_files=[get_file('test_iface_core.sv'),
+                         get_file('test_iface_synth.sv')],
               hdr_files=[get_svreal_header()],
               top='test_iface_synth',
-              cwd=get_dir('tests/tmp/test_iface_synth'))
+              cwd=get_dir('tmp/test_iface_synth')
+    )

tests/test_ite.py

@@ -3,8 +3,8 @@
 import fault
 
 # svreal imports
-from .common import pytest_sim_params
-from svreal.files import get_file, get_svreal_header
+from .common import pytest_sim_params, get_file
+from svreal import get_svreal_header
 
 def pytest_generate_tests(metafunc):
     pytest_sim_params(metafunc)
@@ -55,9 +55,9 @@ def run_iteration(a_i, b_i, cond_i):
     tester.compile_and_run(
         target='system-verilog',
         simulator=simulator,
-        ext_srcs=[get_file('tests/test_ite.sv')],
+        ext_srcs=[get_file('test_ite.sv')],
         inc_dirs=[get_svreal_header().parent],
         defines=defines,
         ext_model_file=True,
         tmp_dir=True
-    )
+    )

tests/test_synth.py

@@ -1,13 +1,14 @@
 # svreal imports
-from .common import pytest_synth_params, run_synth
-from svreal.files import get_file, get_dir, get_svreal_header
+from .common import pytest_synth_params, run_synth, get_file, get_dir
+from svreal import get_svreal_header
 
 def pytest_generate_tests(metafunc):
     pytest_synth_params(metafunc)
 
 def test_synth(synth):
     run_synth(synth=synth,
-              src_files=[get_file('tests/test_synth.sv')],
+              src_files=[get_file('test_synth.sv')],
               hdr_files=[get_svreal_header()],
               top='test_synth',
-              cwd=get_dir('tests/tmp/test_synth'))
+              cwd=get_dir('tmp/test_synth')
+    )