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update tests
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s5suzuki committed Jan 22, 2025
1 parent a0d59b4 commit 88ab16f
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Showing 6 changed files with 123 additions and 8 deletions.
7 changes: 6 additions & 1 deletion autd3-gain-holo/src/nls/lm.rs
Original file line number Diff line number Diff line change
Expand Up @@ -125,9 +125,11 @@ impl<D: Directivity, B: LinAlgBackend<D>> LM<D, B> {
impl<D: Directivity, B: LinAlgBackend<D>> Gain for LM<D, B> {
type G = HoloContextGenerator<f32>;

// GRCOV_EXCL_START
fn init(self) -> Result<Self::G, GainError> {
unimplemented!()
}
// GRCOV_EXCL_STOP

fn init_full(
self,
Expand Down Expand Up @@ -321,7 +323,10 @@ mod tests {
let backend = std::sync::Arc::new(NalgebraBackend::default());

let g = LM {
foci: vec![(Point3::origin(), 1. * Pa), (Point3::origin(), 1. * Pa)],
foci: vec![
(Point3::new(10., 10., 100.), 5e3 * Pa),
(Point3::new(-10., 10., 100.), 5e3 * Pa),
],
backend,
option: LMOption {
k_max: NonZeroUsize::new(2).unwrap(),
Expand Down
16 changes: 9 additions & 7 deletions autd3/src/async/controller/group.rs
Original file line number Diff line number Diff line change
Expand Up @@ -277,7 +277,6 @@ mod tests {
controller::tests::TestGain,
gain::{Null, Uniform},
modulation::{Sine, Static},
prelude::SenderOption,
r#async::{controller::tests::create_controller, AsyncSleeper},
};

Expand Down Expand Up @@ -384,13 +383,16 @@ mod tests {
async fn test_group_sender() -> anyhow::Result<()> {
let mut autd = create_controller(4).await?;

autd.send(Uniform {
intensity: EmitIntensity(0xFF),
phase: Phase::ZERO,
})
.await?;
let mut sender = autd.sender(AsyncSleeper::default(), Default::default());

autd.sender(AsyncSleeper::default(), SenderOption::default())
sender
.send(Uniform {
intensity: EmitIntensity(0xFF),
phase: Phase::ZERO,
})
.await?;

sender
.group(|dev| match dev.idx() {
0 | 1 | 3 => Some(dev.idx()),
_ => None,
Expand Down
4 changes: 4 additions & 0 deletions autd3/src/async/controller/mod.rs
Original file line number Diff line number Diff line change
Expand Up @@ -491,6 +491,10 @@ mod tests {
assert_eq!(Err(AUTDDriverError::SendDataFailed), autd.close().await);
}

{
_ = create_controller(1).await?;
}

Ok(())
}

Expand Down
2 changes: 2 additions & 0 deletions autd3/src/async/controller/sender/sleep.rs
Original file line number Diff line number Diff line change
Expand Up @@ -51,6 +51,7 @@ mod win {
use super::*;

impl AsyncSleep for WaitableSleeper {
// GRCOV_EXCL_START
async fn sleep_until(&self, deadline: Instant) {
unsafe {
let time = deadline - Instant::now();
Expand Down Expand Up @@ -97,5 +98,6 @@ mod win {
}
}
}
// GRCOV_EXCL_STOP
}
}
100 changes: 100 additions & 0 deletions autd3/src/controller/group.rs
Original file line number Diff line number Diff line change
Expand Up @@ -372,6 +372,106 @@ mod tests {
Ok(())
}

#[test]
fn test_group_sender() -> anyhow::Result<()> {
let mut autd = create_controller(4)?;

let mut sender = autd.sender(spin_sleep::SpinSleeper::default(), Default::default());

sender.send(Uniform {
intensity: EmitIntensity(0xFF),
phase: Phase::ZERO,
})?;

sender
.group(|dev| match dev.idx() {
0 | 1 | 3 => Some(dev.idx()),
_ => None,
})
.set(0, Null {})?
.set(1, (Static { intensity: 0x80 }, Null {}))?
.set(
3,
(
Sine {
freq: 150. * Hz,
option: Default::default(),
},
GainSTM {
gains: vec![
Uniform {
intensity: EmitIntensity(0x80),
phase: Phase::ZERO,
},
Uniform {
intensity: EmitIntensity(0x81),
phase: Phase::ZERO,
},
],
config: 1. * Hz,
option: Default::default(),
},
),
)? // GRCOV_EXCL_LINE
.send()?;

assert_eq!(
vec![Drive::NULL; autd.geometry[0].num_transducers()],
autd.link[0].fpga().drives_at(Segment::S0, 0)
);

assert_eq!(
vec![Drive::NULL; autd.geometry[1].num_transducers()],
autd.link[1].fpga().drives_at(Segment::S0, 0)
);
assert_eq!(
vec![0x80, 0x80],
autd.link[1].fpga().modulation_buffer(Segment::S0)
);

assert_eq!(
vec![
Drive {
phase: Phase::ZERO,
intensity: EmitIntensity(0xFF)
};
autd.geometry[2].num_transducers()
],
autd.link[2].fpga().drives_at(Segment::S0, 0)
);

assert_eq!(
*Sine {
freq: 150. * Hz,
option: Default::default(),
}
.calc()?,
autd.link[3].fpga().modulation_buffer(Segment::S0)
);
assert_eq!(
vec![
Drive {
phase: Phase::ZERO,
intensity: EmitIntensity(0x80)
};
autd.geometry[3].num_transducers()
],
autd.link[3].fpga().drives_at(Segment::S0, 0)
);
assert_eq!(
vec![
Drive {
phase: Phase::ZERO,
intensity: EmitIntensity(0x81)
};
autd.geometry[3].num_transducers()
],
autd.link[3].fpga().drives_at(Segment::S0, 1)
);

Ok(())
}

#[test]
fn test_send_failed() -> anyhow::Result<()> {
let mut autd = create_controller(1)?;
Expand Down
2 changes: 2 additions & 0 deletions autd3/src/controller/sender/sleep.rs
Original file line number Diff line number Diff line change
Expand Up @@ -74,6 +74,7 @@ mod win {
}

impl Sleep for WaitableSleeper {
// GRCOV_EXCL_START
fn sleep_until(&self, deadline: Instant) {
unsafe {
let time = deadline - Instant::now();
Expand Down Expand Up @@ -120,5 +121,6 @@ mod win {
}
}
}
// GRCOV_EXCL_STOP
}
}

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