Releases: silvigon/UCLM-Ripes
Releases · silvigon/UCLM-Ripes
UCLM Ripes Release 1.1
Jumping Ripes Release 1.0
Features:
- natalialoprom/cacheRipes: New options for cache simulation, including split, unified, and multi-level cache configurations.
Fixes:
- Cycles are now only counted from one in the pipeline diagram, matching the state of the processor view while avoiding off-by-one errors elsewhere.
And updates the Ripes base to commit df220ca (22/08/2025), which adds new multicycle processor models and bumps the code to C++20.
macOS binaries will be provided once mortbopet#416 is fixed.
Jumping Ripes Release Candidate 2
Fixes:
- CPI calculation now correctly subtracts the extra cycle added when counting from one.
- 1-slot processors are no longer able to forward the ALU result from the EX stage, which was unrealistic.
- Processor descriptions now report the correct stage for branch solution.
Jumping Ripes Release Candidate 1
Fixes:
- When opened, the processor configuration dialog now shows the current processor's selected extensions, rather than resetting to the ISA defaults.
And updates the Ripes base to commit 03df996 (12/05/2025).
Jumping Ripes Beta 4.1
Fixes:
- The 3-slot delayed branch processor now handles branches correctly when they coincide with a load-use hazard.
And updates the Ripes base to commit 8c3783f (02/03/2025), now allowing compilation with GCC 14.
Jumping Ripes Beta 4
Features:
- Refactored processor selection functions and a corresponding unit test.
- An untested macOS package, courtesy of Ripes' GitHub Actions.
Fixes:
- Delayed branch processors (and the 1-slot predict-not-taken processor) will now correctly clear the instruction immediately after an exit syscall.
- Contributor list generation now works on Windows.
- Small miscellaneous issues around the About dialog.
- The URL in the About dialog now points to our public GitHub mirror.
And updates the Ripes base to commit 973d34a (01/02/2025).