initial sch and PCB

sinara-hw · Sep 7, 2019 · abdd8c9 · abdd8c9
commit abdd8c9
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diff --git a/PCB/Fastino.OutJob b/PCB/Fastino.OutJob
diff --git a/PCB/Fastino.PCBDOC b/PCB/Fastino.PCBDOC
diff --git a/PCB/Fastino.PrjPCB b/PCB/Fastino.PrjPCB
diff --git a/PCB/Fastino.schdoc b/PCB/Fastino.schdoc
diff --git a/PCB/Fastino_DAC_channel.SchDoc b/PCB/Fastino_DAC_channel.SchDoc
diff --git a/PCB/Fastino_FPGA.SchDoc b/PCB/Fastino_FPGA.SchDoc
diff --git a/PCB/Fastino_FPGA_Config.SchDoc b/PCB/Fastino_FPGA_Config.SchDoc
diff --git a/PCB/Fastino_FPGA_LVDS.SchDoc b/PCB/Fastino_FPGA_LVDS.SchDoc
diff --git a/PCB/Fastino_FPGA_Supply.SchDoc b/PCB/Fastino_FPGA_Supply.SchDoc
diff --git a/PCB/Fastino_References.SchDoc b/PCB/Fastino_References.SchDoc
diff --git a/PCB/Fastino_Supply.SchDoc b/PCB/Fastino_Supply.SchDoc
diff --git a/PCB/Logo-PW-duze.jpg b/PCB/Logo-PW-duze.jpg
diff --git a/PCB/WUT template A3.SchDot b/PCB/WUT template A3.SchDot