Merge pull request #295 from spacelab-ufsc/dev

Dev: Release v0.8

.github/workflows/doc-build.yml

@@ -0,0 +1,43 @@
+#
+# doc-build.yml
+#
+# Copyright (C) 2021, SpaceLab.
+#
+# This file is part of OBDH 2.0.
+#
+# OBDH 2.0 is free software: you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation, either version 3 of the License, or
+# (at your option) any later version.
+#
+# OBDH 2.0 is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with OBDH 2.0. If not, see <http://www.gnu.org/licenses/>.
+#
+#
+
+
+name: Build LaTeX documentation
+
+on:
+  push:
+    branches: [ documentation ]
+  pull_request:
+    branches: [ master, dev, documentation ]
+
+jobs:
+  build_latex:
+    name: build_latex
+    runs-on: ubuntu-latest
+    steps:
+      - name: Set up Git repository
+        uses: actions/checkout@v2
+      - name: Compile LaTeX document
+        uses: xu-cheng/latex-action@v2
+        with:
+          working_directory: doc
+          root_file: main.tex

.github/workflows/static-analysis.yml

@@ -48,11 +48,17 @@ jobs:
       - name: Install CppCheck
         run: sudo apt install -y cppcheck
 
+      - name: Execute CppCheck on tasks files
+        run: cppcheck --std=c99 --force --error-exitcode=-1 --addon=misra.py firmware/app/tasks/
+
       - name: Execute CppCheck on devices files
-        run: cppcheck --error-exitcode=-1 firmware/devices/
+        run: cppcheck --std=c99 --error-exitcode=-1 --addon=misra.py firmware/devices/
+
+      - name: Execute CppCheck on drivers files
+        run: cppcheck --std=c99 --error-exitcode=-1 --addon=misra.py firmware/drivers/
 
       - name: Execute CppCheck on system files
-        run: cppcheck --error-exitcode=-1 firmware/system/
+        run: cppcheck --std=c99 --error-exitcode=-1 --addon=misra.py firmware/system/
 
       - name: Execute CppCheck on main files
-        run: cppcheck --error-exitcode=-1 firmware/main.c firmware/version.h
+        run: cppcheck --std=c99 --error-exitcode=-1 --addon=misra.py firmware/main.c firmware/version.h

doc/Makefile

@@ -1,5 +1,6 @@
+VERSION=v0.8
 SRC=main
-TARGET=slb-obdh2-doc-v0.7
+TARGET=slb-obdh2-doc-$(VERSION)
 
 ifndef BUILD_DIR
 	BUILD_DIR=build

doc/README.md

@@ -27,6 +27,9 @@
     <a href="#license">
         <img src="https://img.shields.io/badge/LICENSE-CC%20BY--SA%204.0-yellow?style=for-the-badge">
     </a>
+    <a href="https://github.com/spacelab-ufsc/obdh2/actions">
+        <img src="https://img.shields.io/github/workflow/status/spacelab-ufsc/obdh2/Build%20LaTeX%20documentation?style=for-the-badge">
+    </a>
 </p>
 
 <p align="center">
@@ -48,4 +51,4 @@ make
 
 ## License
 
-This document is licensed under Creative Commons Attribution-ShareAlike 4.0 International (CC BY-SA 4.0).
+This document is licensed under Creative Commons Attribution-ShareAlike 4.0 International (CC BY-SA 4.0).

doc/chapters/hardware.tex

@@ -18,7 +18,7 @@
 %
 % \institution Universidade Federal de Santa Catarina (UFSC)
 %
-% \version 0.7.0
+% \version 0.8.0
 %
 % \date 2019/10/20
 %
@@ -72,15 +72,15 @@ \section{Interfaces}
         \toprule[1.5pt]
         \textbf{Peripheral}     & \textbf{USCI} & \textbf{Protocol} & \textbf{Comm. Protocol} \\
         \midrule
-        TTC                     & A0            & SPI               & FSP \\
+        TTC                     & A0            & SPI               & Register read/write \\
         Radio (downlink/link)   & A0            & SPI               & Radio config./NGHam \\
-        Non-Volatile Memory     & A0            & SPI               & - \\
+        NOR Memory              & A0            & SPI               & - \\
+        FRAM Memory             & A0            & SPI               & - \\
         Payload port            & A1            & UART              & -\footnotemark \\
         PC (log messages)       & A2            & UART              & ANSI messages \\
         Payload port            & B0            & I$^{2}$C          & -\footnotemark \\
-        EPS                     & B1            & I$^{2}$C          & CSP\nomenclature{\textbf{CSP}}{\textit{CubeSat Space Protocol.}}
- \\
-        Antenna Module          & B2            & I$^{2}$C          & \\
+        EPS                     & B1            & I$^{2}$C          & Register read/write \\
+        Antenna Module          & B2            & I$^{2}$C          & - \\
         \bottomrule[1.5pt]
     \end{tabular}
     \caption{Boards interfaces.}
@@ -364,7 +364,7 @@ \subsection{Pinout}
     \end{center}
 \end{figure}
 
-\begin{longtable}{lcl}
+\begin{longtable}{lcL{10cm}}
     \toprule[1.5pt]
     \textbf{Pin Code} & \textbf{Pin Number} & \textbf{Signal}       \\
     \midrule
@@ -441,7 +441,7 @@ \subsection{Pinout}
     P8.7              & 67                  & ANTENNA\_GPIO         \\
     \midrule
     P9.0              & 68                  & -                     \\
-    P9.1              & 69                  & -                     \\
+    P9.1              & 69                  & FRAM\_SPI\_CS         \\
     P9.2              & 70                  & UART0\_TX             \\
     P9.3              & 71                  & UART0\_RX             \\
     P9.4              & 72                  & WDI\_EXT              \\
@@ -479,9 +479,13 @@ \section{External Watchdog}
     \end{center}
 \end{figure}
 
-\section{Non-Volatile Memory}
+\section{Non-Volatile Memories}
 
-The non-volatile memory model is the Micron MT25QL01GBBB, which is composed by a NOR flash architecture with 1 Gb of capacity (or 128 MB) and features extended SPI configurations. As can be seen in \autoref{fig:diagram-interfaces}, a SPI bus is used to communicate with this peripheral, using the \autoref{tab:usci-config} configurations. Also, there are some control pins that are connected to microcontroller GPIOs: HOLD\#, RESET\#, and W\#. 
+There are two non-volatile memories available on the module: one flash NOR memory and one FRAM\nomenclature{\textbf{FRAM}}{\textit{Ferroelectric Random-Access Memory.}} memory.
+
+\subsection{Flash NOR}
+
+The flash NOR non-volatile memory model is the Micron MT25QL01GBBB, which is composed by a NOR flash architecture with 1 Gb of capacity (or 128 MB) and features extended SPI configurations. As can be seen in \autoref{fig:diagram-interfaces}, a SPI bus is used to communicate with this peripheral, using the \autoref{tab:usci-config} configurations. Also, there are some control pins that are connected to microcontroller GPIOs: HOLD\#, RESET\#, and W\#.
 
 When RESET\# is driven LOW, the device is reset and the outputs are tri-stated. The HOLD\# signal pauses serial communications without deselecting or resetting the device, consequently outputs are tri-stated and inputs are ignored. The W\# signal handles as a write protection, which freezes the status register, turning its non-volatile bits read-only and preventing the write operation to be executed.
 
@@ -494,6 +498,16 @@ \section{Non-Volatile Memory}
     \end{center}
 \end{figure}
 
+\subsection{FRAM}
+
+\begin{figure}[!ht]
+    \begin{center}
+        \includegraphics[width=0.65\textwidth]{figures/fram-memory-circuit.png}
+        \caption{FRAM memory circuit.}
+        \label{fig:fram-mem-circuit}
+    \end{center}
+\end{figure}
+
 \section{I2C Buffers}
 
 The microcontroller I2C interfaces have dedicated IC buffers, which improve the signal quality throughout the various connectors and offers reliability enhancements, since it protects the bus in case of failures. This measure was adopted in all the satellite modules due to previous failures in I2C buses. Using this scheme, the modules connected though this protocol might have shared connections without losing performance or reliability. 

doc/header/authorpage.tex

@@ -17,7 +17,7 @@
 %
 % \institution Universidade Federal de Santa Catarina (UFSC)
 %
-% \version 0.7.0
+% \version 0.8.0
 %
 % \date 2019/07/18
 %
@@ -28,7 +28,7 @@
 
 \textbf{\thetitle}
 
-\textit{June, 2021}
+\textit{October, 2021}
 
 \vspace{1cm}
 
@@ -66,6 +66,7 @@
             0.5     & Gabriel M. Marcelino        & First stable hardware & 08/2020    \\
             0.6     & A. M. P. Mattos, G. M. Marcelino, Y. A. Azeredo & First hardware integration & 04/2021  \\
             0.7     & A. M. P. Mattos, G. M. Marcelino, Y. A. Azeredo & General firmware and hardware improvements & 06/2021      \\
+            0.8     & Gabriel M. Marcelino        & Adding the FRAM memory & 10/2021    \\
                     &                             &                       &            \\
             \bottomrule[1.5pt]
         \end{tabular}

doc/header/titlepage.tex

@@ -17,7 +17,7 @@
 %
 % \institution Universidade Federal de Santa Catarina (UFSC)
 %
-% \version 0.7.0
+% \version 0.8.0
 %
 % \date 2019/07/18
 %
@@ -27,7 +27,7 @@
 \thispagestyle{empty}
 
 \begin{flushleft}
-SLB-OBDH2-DOC-v0.7
+SLB-OBDH2-DOC-v0.8
 \end{flushleft}
 
 \vspace{1cm}
@@ -54,7 +54,7 @@
 \vfill
 
 \begin{flushright}
-June 2021
+October 2021
 \end{flushright}
 
 \end{titlepage}

firmware/CHANGELOG

@@ -1,5 +1,18 @@
 ===========================================
 
+v0.8 - 2021/10/10
+
+- FRAM interface on media device
+- CY15x102QN driver
+- Unit tests of the drivers
+- Unit tests of the devices
+- Mockups of the unit tests
+- General fixes according to the unit tests
+- Static analysis with CppCheck
+- Source files compliant with the MISRA-C:2012 (excluding external libraries)
+
+===========================================
+
 v0.7 - 2021/06/09
 
 - Removing file system libraries

firmware/app/tasks/beacon.c

@@ -1,7 +1,7 @@
 /*
  * beacon.c
  * 
- * Copyright (C) 2020, SpaceLab.
+ * Copyright (C) 2021, SpaceLab.
  * 
  * This file is part of OBDH 2.0.
  * 
@@ -16,7 +16,7 @@
  * GNU General Public License for more details.
  * 
  * You should have received a copy of the GNU General Public License
- * along with OBDH 2.0. If not, see <http://www.gnu.org/licenses/>.
+ * along with OBDH 2.0. If not, see <http:/\/www.gnu.org/licenses/>.
  * 
  */
 
@@ -25,9 +25,9 @@
  * 
  * \author Gabriel Mariano Marcelino <gabriel.mm8@gmail.com>
  * 
- * \version 0.3.10
+ * \version 0.7.47
  * 
- * \date 27/10/2019
+ * \date 2019/10/27
  * 
  * \addtogroup beacon
  * \{
@@ -42,7 +42,7 @@
 
 xTaskHandle xTaskBeaconHandle;
 
-void vTaskBeacon(void *pvParameters)
+void vTaskBeacon(void)
 {
     /* Wait startup task to finish */
     xEventGroupWaitBits(task_startup_status, TASK_STARTUP_DONE, pdFALSE, pdTRUE, pdMS_TO_TICKS(TASK_BEACON_INIT_TIMEOUT_MS));

firmware/app/tasks/beacon.h

@@ -1,7 +1,7 @@
 /*
  * beacon.h
  * 
- * Copyright (C) 2020, SpaceLab.
+ * Copyright (C) 2021, SpaceLab.
  * 
  * This file is part of OBDH 2.0.
  * 
@@ -25,9 +25,9 @@
  * 
  * \author Gabriel Mariano Marcelino <gabriel.mm8@gmail.com>
  * 
- * \version 0.3.10
+ * \version 0.7.47
  * 
- * \date 27/10/2019
+ * \date 2019/10/27
  * 
  * \defgroup beacon Beacon
  * \ingroup tasks
@@ -55,11 +55,9 @@ extern xTaskHandle xTaskBeaconHandle;
 /**
  * \brief Beacon task.
  *
- * \param[in] pvParameters is a value that will passed as the task's parameter.
- *
  * \return None.
  */
-void vTaskBeacon(void *pvParameters);
+void vTaskBeacon(void);
 
 #endif /* BEACON_H_ */
 

firmware/app/tasks/csp_server.c

@@ -1,7 +1,7 @@
 /*
  * csp_server.c
  * 
- * Copyright (C) 2020, SpaceLab.
+ * Copyright (C) 2021, SpaceLab.
  * 
  * This file is part of OBDH 2.0.
  * 
@@ -16,7 +16,7 @@
  * GNU General Public License for more details.
  * 
  * You should have received a copy of the GNU General Public License
- * along with OBDH 2.0. If not, see <http://www.gnu.org/licenses/>.
+ * along with OBDH 2.0. If not, see <http:/\/www.gnu.org/licenses/>.
  * 
  */
 
@@ -25,9 +25,9 @@
  * 
  * \author Gabriel Mariano Marcelino <gabriel.mm8@gmail.com>
  * 
- * \version 0.3.7
+ * \version 0.7.47
  * 
- * \date 04/04/2020
+ * \date 2020/04/04
  * 
  * \addtogroup csp_server
  * \{
@@ -42,7 +42,7 @@
 
 xTaskHandle xTaskCSPServerHandle;
 
-void vTaskCSPServer(void *pvParameters)
+void vTaskCSPServer(void)
 {
     /* Wait startup task to finish */
     xEventGroupWaitBits(task_startup_status, TASK_STARTUP_DONE, pdFALSE, pdTRUE, pdMS_TO_TICKS(TASK_CSP_SERVER_INIT_TIMEOUT_MS));
@@ -63,18 +63,24 @@ void vTaskCSPServer(void *pvParameters)
     while(1)
     {
         /* Wait for connection until reach timeout */
-        if ((conn = csp_accept(sock, CONFIG_CSP_WAIT_CONN_TIMEOUT_MS)) == NULL)
+        conn = csp_accept(sock, CONFIG_CSP_WAIT_CONN_TIMEOUT_MS);
+        if (conn == NULL)
         {
             continue;
         }
 
         /* Read packets until reach timeout */
-        while((packet = csp_read(conn, CONFIG_CSP_READ_PKT_TIMEOUT_MS)) != NULL)
+        packet = csp_read(conn, CONFIG_CSP_READ_PKT_TIMEOUT_MS);
+        while(packet != NULL)
         {
             switch(csp_conn_dport(conn))
             {
-                case CONFIG_CSP_PORT:
+                case CONFIG_CSP_PRIMARY_PORT:
                     /* TODO: Process packet here */
+                    break;
+                case CONFIG_CSP_SECONDARY_PORT:
+                    /* TODO: Process packet here */
+                    break;
                 default:
                     /* Let the service handler reply pings, buffer use, etc. */
                     csp_service_handler(conn, packet);