🧪 Rework makefile/linker script memory configuration (#1072)

CHANGELOG.md

@@ -29,6 +29,7 @@ mimpid = 0x01040312 -> Version 01.04.03.12 -> v1.4.3.12
 
 | Date | Version | Comment | Ticket |
 |:----:|:-------:|:--------|:------:|
+| 21.10.2024 | 1.10.5.10 | :test_tube: rework linker script's ROM/IMEM default size (=16kB); add customization variable to all makefiles in `sw/example` | [#1072](https://github.com/stnolting/neorv32/pull/1072) |
 | 20.10.2024 | 1.10.5.9 | :warning: rework XIRQ controller; remove "interrupt pending" register `EIP` | [#1071](https://github.com/stnolting/neorv32/pull/1071) |
 | 18.10.2024 | 1.10.5.8 | minor RTL code cleanups | [#1068](https://github.com/stnolting/neorv32/pull/1068) |
 | 18.10.2024 | 1.10.5.7 | use individual/new module for XBUS-to-AXI4-Lite bridge | [#1063](https://github.com/stnolting/neorv32/pull/1063) |

docs/datasheet/software.adoc

@@ -362,45 +362,39 @@ relevant for the executable itself; the remaining sections are just listed for c
 | `io`            | Address space for the processor-internal IO/peripheral devices
 |=======================
 
-[NOTE]
-The `rom` section is automatically re-mapped to the processor-internal <<_bootloader_rom_bootrom>> when compiling the
-bootloader sources.
-
 Each section has two main attributes: `ORIGIN` and `LENGTH`. `ORIGIN` defines the base address of the according section
 while `LENGTH` defines its size in bytes. For the `ram` and `rom` sections these attributes are configured indirectly
-via variables that provide default values.
+via variables that already provide _default values_:
 
 .Linker script - section configuration
 [source]
 ----
 /* Default rom/ram (IMEM/DMEM) sizes */
-__neorv32_rom_size = DEFINED(__neorv32_rom_size) ? __neorv32_rom_size : 2048M;
+__neorv32_rom_size = DEFINED(__neorv32_rom_size) ? __neorv32_rom_size : 16k;
 __neorv32_ram_size = DEFINED(__neorv32_ram_size) ? __neorv32_ram_size : 8K;
 
-/* Default section base addresses */
+/* Default rom/ram (IMEM/DMEM) base addresses */
 __neorv32_rom_base = DEFINED(__neorv32_rom_base) ? __neorv32_rom_base : 0x00000000;
 __neorv32_ram_base = DEFINED(__neorv32_ram_base) ? __neorv32_ram_base : 0x80000000;
 ----
 
-The region size and base address configuration can be edited by the user - either by explicitly
-changing the default values in the linker script or by overriding them when invoking `make`:
+.Bootloader ROM
+[NOTE]
+The `rom` section is automatically re-mapped to the processor-internal <<_bootloader_rom_bootrom>> when compiling the
+bootloader sources.
+
+The default region sizes (and base addresses) can be edited by the user when invoking `make`:
 
-.Overriding default `rom` size configuration (configuring 4096 bytes)
+.Overriding default memory sizes (configuring 64kB IMEM and 32kB DMEM)
 [source, bash]
 ----
-$ make USER_FLAGS+="-Wl,--defsym,__neorv32_rom_size=4096" clean_all exe
+$ make USER_FLAGS+="-Wl,--defsym,__neorv32_rom_size=64k -Wl,--defsym,__neorv32_ram_size=32k" clean_all exe
 ----
 
-[IMPORTANT]
+.Changing the default base addresses
+[WARNING]
 `__neorv32_rom_base` (= `ORIGIN` of the `rom` section) and `__neorv32_ram_base` (= `ORIGIN` of the `ram` section) have to
-be sync to the actual memory layout configuration of the processor (see section <<_address_space>>).
-
-[NOTE]
-The default configuration for the `rom` section assumes a maximum of 2GB _logical_ memory address space. This size does not
-have to reflect the _actual_ physical size of the entire instruction memory. It just provides a maximum limit. When uploading
-a new executable via the bootloader, the bootloader itself checks if sufficient _physical_ instruction memory is available.
-If a new executable is embedded right into the internal-IMEM the synthesis tool will check, if the configured instruction memory
-size is sufficient.
+be match the actual processor memory layout configuration of the processor (see section <<_address_space>>).
 
 The linker maps all the regions from the compiled object files into five final sections: `.text`,
 `.rodata`, `.data`, `.bss` and `.heap`:

rtl/core/neorv32_package.vhd

@@ -29,7 +29,7 @@ package neorv32_package is
 
   -- Architecture Constants -----------------------------------------------------------------
   -- -------------------------------------------------------------------------------------------
-  constant hw_version_c : std_ulogic_vector(31 downto 0) := x"01100509"; -- hardware version
+  constant hw_version_c : std_ulogic_vector(31 downto 0) := x"01100510"; -- hardware version
   constant archid_c     : natural := 19; -- official RISC-V architecture ID
   constant XLEN         : natural := 32; -- native data path width
 

sim/neorv32_tb.vhd

@@ -158,7 +158,7 @@ begin
     if ci_mode then
       -- No need to send the full expectation in one big chunk
       check_uart(net, uart1_rx_handle, nul & nul);
-      check_uart(net, uart1_rx_handle, "0/56" & cr & lf);
+      check_uart(net, uart1_rx_handle, "0/55" & cr & lf);
     end if;
 
     -- Wait until all expected data has been received

sw/common/neorv32.ld

@@ -1,5 +1,5 @@
 /* ================================================================================ */
-/* NEORV32 CPU - RISC-V GCC Linker Script                                           */
+/* NEORV32 - RISC-V GCC Linker Script                                               */
 /* -------------------------------------------------------------------------------- */
 /* The NEORV32 RISC-V Processor - https://github.com/stnolting/neorv32              */
 /* Copyright (c) NEORV32 contributors.                                              */
@@ -13,7 +13,6 @@
  * are permitted in any medium without royalty provided the copyright
  * notice and this notice are preserved. */
 
-
 OUTPUT_FORMAT("elf32-littleriscv")
 OUTPUT_ARCH(riscv)
 ENTRY(_start)
@@ -25,25 +24,24 @@ SEARCH_DIR("=/usr/lib")
 
 /* ************************************************************************************************* */
 /* +++ NEORV32 memory layout configuration +++                                                       */
-/* If the symbols are not explicitly defined the default configurations are used. If required, only  */
-/* edit the very last entry in each row.                                                             */
+/* If the symbols are not explicitly defined the default configurations are used.                    */
 /* NOTE: section sizes have to be a multiple of 4 bytes; base addresses have to be 32-bit-aligned.   */
 /* ************************************************************************************************* */
 
-/* Default rom/ram (IMEM/DMEM) sizes */
-__neorv32_rom_size = DEFINED(__neorv32_rom_size) ? __neorv32_rom_size : 2048M;
-__neorv32_ram_size = DEFINED(__neorv32_ram_size) ? __neorv32_ram_size : 8K;
-
 /* Default HEAP size (= 0; no heap at all) */
 __neorv32_heap_size = DEFINED(__neorv32_heap_size) ? __neorv32_heap_size : 0;
 
-/* Default section base addresses */
+/* Default rom/ram (IMEM/DMEM) sizes */
+__neorv32_rom_size = DEFINED(__neorv32_rom_size) ? __neorv32_rom_size : 16k;
+__neorv32_ram_size = DEFINED(__neorv32_ram_size) ? __neorv32_ram_size : 8K;
+
+/* Default rom/ram (IMEM/DMEM) base addresses */
 __neorv32_rom_base = DEFINED(__neorv32_rom_base) ? __neorv32_rom_base : 0x00000000;
 __neorv32_ram_base = DEFINED(__neorv32_ram_base) ? __neorv32_ram_base : 0x80000000;
 
 
 /* ************************************************************************************************* */
-/* when compiling the bootloader the ROM section is automatically re-mapped to the                   */
+/* When compiling the bootloader the ROM section is automatically re-mapped to the                   */
 /* processor-internal bootloader ROM address space.                                                  */
 /* ************************************************************************************************* */
 MEMORY

sw/example/atomic_test/makefile

@@ -1,4 +1,33 @@
-# Modify this variable to fit your NEORV32 setup (neorv32 home folder)
+# Application makefile.
+# Use this makefile to configure all relevant CPU / compiler options.
+
+# Override the default CPU ISA
+MARCH = rv32ia_zicsr_zifencei
+
+# Override the default RISC-V GCC prefix
+#RISCV_PREFIX ?= riscv-none-elf-
+
+# Override default optimization goal
+EFFORT = -Os
+
+# Add extended debug symbols
+USER_FLAGS += -ggdb -gdwarf-3
+
+# Adjust processor IMEM size
+USER_FLAGS += -Wl,--defsym,__neorv32_rom_size=16k
+
+# Adjust processor DMEM size
+USER_FLAGS += -Wl,--defsym,__neorv32_ram_size=8k
+
+# Adjust maximum heap size
+#USER_FLAGS += -Wl,--defsym,__neorv32_heap_size=1k
+
+# Additional sources
+#APP_SRC += $(wildcard ./*.c)
+#APP_INC += -I .
+
+# Set path to NEORV32 root directory
 NEORV32_HOME ?= ../../..
 
+# Include the main NEORV32 makefile
 include $(NEORV32_HOME)/sw/common/common.mk

sw/example/bus_explorer/makefile

@@ -1,4 +1,33 @@
-# Modify this variable to fit your NEORV32 setup (neorv32 home folder)
+# Application makefile.
+# Use this makefile to configure all relevant CPU / compiler options.
+
+# Override the default CPU ISA
+MARCH = rv32i_zicsr_zifencei
+
+# Override the default RISC-V GCC prefix
+#RISCV_PREFIX ?= riscv-none-elf-
+
+# Override default optimization goal
+EFFORT = -Os
+
+# Add extended debug symbols
+USER_FLAGS += -ggdb -gdwarf-3
+
+# Adjust processor IMEM size
+USER_FLAGS += -Wl,--defsym,__neorv32_rom_size=16k
+
+# Adjust processor DMEM size
+USER_FLAGS += -Wl,--defsym,__neorv32_ram_size=8k
+
+# Adjust maximum heap size
+#USER_FLAGS += -Wl,--defsym,__neorv32_heap_size=1k
+
+# Additional sources
+#APP_SRC += $(wildcard ./*.c)
+#APP_INC += -I .
+
+# Set path to NEORV32 root directory
 NEORV32_HOME ?= ../../..
 
+# Include the main NEORV32 makefile
 include $(NEORV32_HOME)/sw/common/common.mk

sw/example/coremark/makefile

@@ -1,4 +1,33 @@
-# Modify this variable to fit your NEORV32 setup (neorv32 home folder)
+# Application makefile.
+# Use this makefile to configure all relevant CPU / compiler options.
+
+# Override the default CPU ISA
+MARCH = rv32imc_zicsr_zifencei
+
+# Override the default RISC-V GCC prefix
+#RISCV_PREFIX ?= riscv-none-elf-
+
+# Override default optimization goal
+EFFORT = -O3
+
+# Add extended debug symbols
+USER_FLAGS += -ggdb -gdwarf-3
+
+# Adjust processor IMEM size
+USER_FLAGS += -Wl,--defsym,__neorv32_rom_size=32k
+
+# Adjust processor DMEM size
+USER_FLAGS += -Wl,--defsym,__neorv32_ram_size=8k
+
+# Adjust maximum heap size
+#USER_FLAGS += -Wl,--defsym,__neorv32_heap_size=1k
+
+# Additional sources
+#APP_SRC += $(wildcard ./*.c)
+#APP_INC += -I .
+
+# Set path to NEORV32 root directory
 NEORV32_HOME ?= ../../..
 
+# Include the main NEORV32 makefile
 include $(NEORV32_HOME)/sw/common/common.mk

sw/example/demo_blink_led/makefile

@@ -1,4 +1,33 @@
-# Modify this variable to fit your NEORV32 setup (neorv32 home folder)
+# Application makefile.
+# Use this makefile to configure all relevant CPU / compiler options.
+
+# Override the default CPU ISA
+MARCH = rv32i_zicsr_zifencei
+
+# Override the default RISC-V GCC prefix
+#RISCV_PREFIX ?= riscv-none-elf-
+
+# Override default optimization goal
+EFFORT = -Os
+
+# Add extended debug symbols
+USER_FLAGS += -ggdb -gdwarf-3
+
+# Adjust processor IMEM size
+USER_FLAGS += -Wl,--defsym,__neorv32_rom_size=16k
+
+# Adjust processor DMEM size
+USER_FLAGS += -Wl,--defsym,__neorv32_ram_size=8k
+
+# Adjust maximum heap size
+#USER_FLAGS += -Wl,--defsym,__neorv32_heap_size=1k
+
+# Additional sources
+#APP_SRC += $(wildcard ./*.c)
+#APP_INC += -I .
+
+# Set path to NEORV32 root directory
 NEORV32_HOME ?= ../../..
 
+# Include the main NEORV32 makefile
 include $(NEORV32_HOME)/sw/common/common.mk

sw/example/demo_blink_led_asm/makefile

@@ -1,4 +1,33 @@
-# Modify this variable to fit your NEORV32 setup (neorv32 home folder)
+# Application makefile.
+# Use this makefile to configure all relevant CPU / compiler options.
+
+# Override the default CPU ISA
+MARCH = rv32i_zicsr_zifencei
+
+# Override the default RISC-V GCC prefix
+#RISCV_PREFIX ?= riscv-none-elf-
+
+# Override default optimization goal
+EFFORT = -Os
+
+# Add extended debug symbols
+USER_FLAGS += -ggdb -gdwarf-3
+
+# Adjust processor IMEM size
+USER_FLAGS += -Wl,--defsym,__neorv32_rom_size=16k
+
+# Adjust processor DMEM size
+USER_FLAGS += -Wl,--defsym,__neorv32_ram_size=8k
+
+# Adjust maximum heap size
+#USER_FLAGS += -Wl,--defsym,__neorv32_heap_size=1k
+
+# Additional sources
+#APP_SRC += $(wildcard ./*.c)
+#APP_INC += -I .
+
+# Set path to NEORV32 root directory
 NEORV32_HOME ?= ../../..
 
+# Include the main NEORV32 makefile
 include $(NEORV32_HOME)/sw/common/common.mk

sw/example/demo_cfs/makefile

@@ -1,4 +1,33 @@
-# Modify this variable to fit your NEORV32 setup (neorv32 home folder)
+# Application makefile.
+# Use this makefile to configure all relevant CPU / compiler options.
+
+# Override the default CPU ISA
+MARCH = rv32i_zicsr_zifencei
+
+# Override the default RISC-V GCC prefix
+#RISCV_PREFIX ?= riscv-none-elf-
+
+# Override default optimization goal
+EFFORT = -Os
+
+# Add extended debug symbols
+USER_FLAGS += -ggdb -gdwarf-3
+
+# Adjust processor IMEM size
+USER_FLAGS += -Wl,--defsym,__neorv32_rom_size=16k
+
+# Adjust processor DMEM size
+USER_FLAGS += -Wl,--defsym,__neorv32_ram_size=8k
+
+# Adjust maximum heap size
+#USER_FLAGS += -Wl,--defsym,__neorv32_heap_size=1k
+
+# Additional sources
+#APP_SRC += $(wildcard ./*.c)
+#APP_INC += -I .
+
+# Set path to NEORV32 root directory
 NEORV32_HOME ?= ../../..
 
+# Include the main NEORV32 makefile
 include $(NEORV32_HOME)/sw/common/common.mk

sw/example/demo_cfu/makefile

@@ -1,4 +1,33 @@
-# Modify this variable to fit your NEORV32 setup (neorv32 home folder)
+# Application makefile.
+# Use this makefile to configure all relevant CPU / compiler options.
+
+# Override the default CPU ISA
+MARCH = rv32i_zicsr_zifencei
+
+# Override the default RISC-V GCC prefix
+#RISCV_PREFIX ?= riscv-none-elf-
+
+# Override default optimization goal
+EFFORT = -Os
+
+# Add extended debug symbols
+USER_FLAGS += -ggdb -gdwarf-3
+
+# Adjust processor IMEM size
+USER_FLAGS += -Wl,--defsym,__neorv32_rom_size=16k
+
+# Adjust processor DMEM size
+USER_FLAGS += -Wl,--defsym,__neorv32_ram_size=8k
+
+# Adjust maximum heap size
+#USER_FLAGS += -Wl,--defsym,__neorv32_heap_size=1k
+
+# Additional sources
+#APP_SRC += $(wildcard ./*.c)
+#APP_INC += -I .
+
+# Set path to NEORV32 root directory
 NEORV32_HOME ?= ../../..
 
+# Include the main NEORV32 makefile
 include $(NEORV32_HOME)/sw/common/common.mk