Implemented riscv64 syscall support by modifying source code of opensbi and sbi-spec #69
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More precisely speaking, by having opensbi to pass unknown ecall to ruxos trap handler.
Note that due to the change of
[patch.crates.io]
in /Cargo.toml, CIs won't pass unless we init submodules before tests in CI procedures. Also, I couldn't find acfg(target_arch = "riscv64")
version of[patch.crates.io]
.Besides this modification, this PR does the following jobs:
opensbi and sbi-spec (used by sbi-rt used by ruxhal) are integrated via
git submodule
.added 1000 to eid in sbi calls to distinguish sbi calls from posix sysacalls.
changed the default size of physical memory to 1G, as more would cause dtb page error in my environment.