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Merge pull request #20 from tdk-invn-oss/release/4.4.1
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Release 4.4.1.
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mhkline authored Oct 18, 2024
2 parents 2233908 + d168512 commit a6514c1
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Showing 15 changed files with 1,230 additions and 837 deletions.
9 changes: 7 additions & 2 deletions invn/icu_interface/shasta_external_regs.h
Original file line number Diff line number Diff line change
Expand Up @@ -10,6 +10,7 @@
#include "shasta_pmut_instruction.h"
#include "shasta_atp_format.h"
#include "shasta_iq_format.h"
#include "icu_algo_info.h"

#define REG_FMT_MAJOR (1)
#define REG_FMT_MINOR (0)
Expand All @@ -23,7 +24,7 @@ typedef struct raw_output_data{
volatile uint8_t odr_out; //output ODR
volatile uint8_t iq_output_format;//the format of the IQdata buffer (See IQ_OUTPUT_*)
volatile int8_t reserved; //used for INTCONFIG_ON_TARGET; -1 by default if no algo present
volatile uint16_t reserved2; //hack to align this struct...
volatile uint16_t reserved2; // address to read IQ data from
//! Number of IQ bytes in last measurement
volatile uint16_t num_iq_bytes;
#ifndef INVN_NO_VIRTUAL_REGS
Expand Down Expand Up @@ -55,19 +56,23 @@ typedef struct measurement{ // size: 172 bytes
#define TRIGSRC_HWTRIGGER_INT2 (1<<1)
#define TRIGSRC_RTC (1<<2)
#define TRIGSRC_CONTINUOUS_RX (1<<3)
#define TRIGSRC_MEMS_DIRECT_CONNECT (1<<4)

#define INTCONFIG_DR_INT2 (1<<0) //if this bit is set, use int2 for DATAREADY
#define INTCONFIG_ON_TARGET (1<<1) //if this bit is set, only output DATAREADY when a target is detected
#define INTCONFIG_PULSE_INT (1<<2) //if this bit is set, pulse the configured INT rather than latch it til next SPI read
#define INTCONFIG_PUSH_PULL_INT (1<<3) // if this bit is set, int will be actively driven high instead of using PU resistor

#define READOUT_OPTIONS_DOUBLE_BUFFER_BM (1) // if set, double buffering mode is enabled
#define READOUT_OPTIONS_METADATA_IN_S0_BM (1<<1) // if set, IQ buffer address and last_measurement idx will be placed in IQ sample 0

typedef struct measurement_queue{ // size: 142 bytes
volatile uint8_t intconfig; // 0x02 switch interrupts to INT2 (see INTCONFIG_*)
volatile uint8_t meas_start; // 0x03 which measurement do we start on
volatile uint8_t meas_stop; // 0x04 which measurement do we stop on
volatile uint8_t current_meas; // 0x05 which measurement do we do next
volatile uint8_t trigsrc;// 0x06 add optional triggers from hardware pins (falling edge of INT1 or INT2) or LPWKUP timer (see TRIGSRC_*)
volatile uint8_t reserved; // 0x07 future use
volatile uint8_t reserved; // for double buffering and metadata packing options
volatile measurement_t meas[MEAS_QUEUE_MAX_MEAS]; // 0x08 up to MEAS_QUEUE_MAX_MEAS measurements can be held at one time
}measurement_queue_t;

Expand Down
58 changes: 58 additions & 0 deletions invn/soniclib/ch_api.c
Original file line number Diff line number Diff line change
Expand Up @@ -243,6 +243,9 @@ uint8_t ch_get_dev_num(ch_dev_t *dev_ptr) {

ch_dev_t *ch_get_dev_ptr(ch_group_t *grp_ptr, uint8_t dev_num) {

if (dev_num >= grp_ptr->num_ports) {
return NULL;
}
return grp_ptr->device[dev_num];
}

Expand Down Expand Up @@ -649,6 +652,11 @@ uint8_t ch_io_start_nb(ch_group_t *grp_ptr) {
return ret_val;
}

uint8_t ch_minimal_int_handler(ch_group_t *grp_ptr, uint8_t dev_num) {

return chdrv_int_notify(grp_ptr, dev_num);
}

/*!
* \brief Notify SonicLib that a sensor interrupt occurred.
*
Expand Down Expand Up @@ -773,6 +781,52 @@ ch_interrupt_drive_t ch_get_interrupt_drive(ch_dev_t *dev_ptr) {

return ch_common_get_interrupt_drive(dev_ptr);
}

uint8_t ch_enable_double_buffer(ch_dev_t *dev_ptr, uint8_t enable) {
int ret_val = RET_OK;

if (enable) {
dev_ptr->meas_queue.reserved |= READOUT_OPTIONS_DOUBLE_BUFFER_BM;
} else {
dev_ptr->meas_queue.reserved &= ~READOUT_OPTIONS_DOUBLE_BUFFER_BM;
}

ret_val = ch_common_meas_write_config(dev_ptr);

return ret_val;
}

uint8_t ch_enable_metadata_in_iq0(ch_dev_t *dev_ptr, uint8_t enable) {
int ret_val = RET_OK;

if (enable) {
dev_ptr->meas_queue.reserved |= READOUT_OPTIONS_METADATA_IN_S0_BM;
} else {
dev_ptr->meas_queue.reserved &= ~READOUT_OPTIONS_METADATA_IN_S0_BM;
}

ret_val = ch_common_meas_write_config(dev_ptr);

return ret_val;
}

uint8_t ch_update_metadata_from_iq0(ch_dev_t *dev_ptr, ch_iq_sample_t *iq_data) {
uint16_t *buf_ptr = (uint16_t *)iq_data;
const uint16_t next_buf_addr = *buf_ptr;
buf_ptr += 1; // move to next word
const uint8_t is_valid = (*buf_ptr) >> 8; // get MSByte
const uint8_t last_meas_num = (*buf_ptr) & 0xFF; // get LSByte
if (is_valid) {
dev_ptr->last_measurement = last_meas_num;
dev_ptr->buf_addr = next_buf_addr;
}
// set the first IQ sample to 0 after extracting metadata since many downstream
// tools expect the first IQ sample to be 0 (ASIC always writes 0 as first sample).
iq_data[0].i = 0;
iq_data[0].q = 0;
return (is_valid) ? 0 : 1;
}

#endif

uint8_t ch_set_rx_low_gain(ch_dev_t *dev_ptr, uint16_t num_samples) {
Expand Down Expand Up @@ -1021,6 +1075,10 @@ uint8_t ch_meas_get_last_num(ch_dev_t *dev_ptr) {
return ch_common_meas_get_last_num(dev_ptr);
}

uint16_t ch_get_next_buf_addr(ch_dev_t *dev_ptr) {
return dev_ptr->buf_addr;
}

uint8_t ch_meas_write_config(ch_dev_t *dev_ptr) {

return ch_common_meas_write_config(dev_ptr);
Expand Down
10 changes: 2 additions & 8 deletions invn/soniclib/ch_common.c
Original file line number Diff line number Diff line change
Expand Up @@ -1033,14 +1033,7 @@ static uint8_t get_sample_data(ch_dev_t *dev_ptr, ch_iq_sample_t *buf_ptr, uint1
}

#ifdef INCLUDE_SHASTA_SUPPORT
const uint8_t last_meas = ch_common_meas_get_last_num(dev_ptr);
const uint8_t is_continuous = dev_ptr->is_continuous;
iq_data_addr = (uint16_t)(uintptr_t) & ((dev_ptr->sens_cfg_addr)->raw.IQdata); // start of I/Q data
if (is_continuous && last_meas == 1) {
// start from middle of buffer in continuous mode when reading the
// result of meas 1. Mult by 4 to convert to bytes then divide by 2
iq_data_addr += (dev_ptr->current_fw->max_samples << 2) >> 1;
}
iq_data_addr = dev_ptr->buf_addr;
iq_data_addr += (start_sample * sample_size_in_bytes); // add sample offset

if (mode == CH_IO_MODE_BLOCK) {
Expand Down Expand Up @@ -2929,6 +2922,7 @@ uint8_t ch_common_read_meas_config(ch_dev_t *dev_ptr) {
dev_ptr->odr_out = odr_out;
dev_ptr->iq_output_format = iq_output_format;
dev_ptr->num_iq_bytes = num_iq_bytes;
err = chdrv_read_buf_addr(dev_ptr);
}

return err;
Expand Down
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