Fix bitflags clippy warnings

Signed-off-by: Klimenty Tsoutsman <klim@tsoutsman.com>

kernel/ata/Cargo.toml

@@ -6,7 +6,7 @@ version = "0.1.0"
 edition = "2018"
 
 [dependencies]
-bitflags = "1.1.0"
+bitflags = "2.4.1"
 log = "0.4.8"
 spin = "0.9.4"
 x86_64 = "0.14.8"

kernel/ata/src/lib.rs

@@ -41,6 +41,7 @@ const PCI_BAR_PORT_MASK: u16 = 0xFFFC;
 
 bitflags! {
 	/// The possible error values found in an ATA drive's error port.
+    #[derive(Clone, Copy, Debug, Eq, PartialEq)]
     pub struct AtaError: u8 {
 		const BAD_BLOCK              = 0x80;
 		const UNCORRECTABLE_DATA     = 0x40;
@@ -55,6 +56,7 @@ bitflags! {
 
 bitflags! {
 	/// The possible status values found in an ATA drive's status port.
+    #[derive(Clone, Copy, Debug, Eq, PartialEq)]
     pub struct AtaStatus: u8 {
 		/// When set, the drive's port values are still changing, so ports shouldn't be accessed. 
 		const BUSY                 = 0x80;
@@ -73,6 +75,7 @@ bitflags! {
 
 bitflags! {
 	/// The possible control values used in an ATA drive's status port.
+    #[derive(Clone, Copy, Debug, Eq, PartialEq)]
     struct AtaControl: u8 {
 		/// Set this to read back the High Order Byte of the last-written LBA48 value.
 		const HOB   = 0x80;

kernel/boot_info/Cargo.toml

@@ -6,7 +6,7 @@ description = "Abstraction over multiboot2 and UEFI boot information"
 edition = "2021"
 
 [dependencies]
-bitflags = "1.3"
+bitflags = "2.4.1"
 kernel_config = { path = "../kernel_config" }
 memory_structs = { path = "../memory_structs" }
 multiboot2 = { version = "0.14", optional = true }

kernel/iommu/Cargo.toml

@@ -9,7 +9,7 @@ log = "0.4.8"
 spin = "0.9.4"
 volatile = "0.2.7"
 zerocopy = "0.5.0"
-bitflags = "1.3.2"
+bitflags = "2.4.1"
 
 [dependencies.sync_irq]
 path = "../../libs/sync_irq"

kernel/iommu/src/regs.rs

@@ -183,6 +183,7 @@ bitflags! {
     ///
     /// The least significant bits `[22:0]` are `RsvdZ`,
     /// meaning that they are reserved for future usage and must be set to 0.
+    #[derive(Clone, Copy, Debug, Eq, PartialEq)]
     pub struct GlobalStatus: u32 {
         /// Compatibility Format Interrupt Status
         const CFIS  = 1 << 23;

kernel/memory/Cargo.toml

@@ -7,7 +7,7 @@ edition = "2021"
 
 [dependencies]
 spin = "0.9.4"
-bitflags = "1.1.0"
+bitflags = "2.4.1"
 xmas-elf = { version = "0.6.2", git = "https://github.com/theseus-os/xmas-elf.git" }
 bit_field = "0.7.0"
 zerocopy = "0.5.0"

kernel/pte_flags/Cargo.toml

@@ -7,4 +7,4 @@ edition = "2021"
 
 [dependencies]
 cfg-if = "1.0.0"
-bitflags = "1.3.2"
+bitflags = "2.4.1"

kernel/pte_flags/src/lib.rs

@@ -64,6 +64,7 @@ bitflags! {
     /// 
     /// This type can also be converted *from* `PteFlagsX86_64` and `PteFlagsAarch64`,
     /// but it may be lossy as only the bit flags defined herein are preserved.
+    #[derive(Clone, Copy, Debug, Eq, PartialEq)]
     pub struct PteFlags: u64 {
         /// * If set, this page is currently "present" in memory. 
         /// * If not set, this page is not in memory, which could mean one of several things:
@@ -184,8 +185,8 @@ impl PteFlags {
     ///       that we don't care about.
     pub const fn new() -> Self {
         Self::from_bits_truncate(
-            Self::ACCESSED.bits
-            | Self::NOT_EXECUTABLE.bits
+            Self::ACCESSED.bits()
+            | Self::NOT_EXECUTABLE.bits()
         )
     }
 

kernel/pte_flags/src/pte_flags_aarch64.rs

@@ -33,6 +33,7 @@ bitflags! {
     ///
     /// [MAIR]: https://docs.rs/cortex-a/latest/cortex_a/registers/MAIR_EL1/index.html
     #[doc(cfg(target_arch = "aarch64"))]
+    #[derive(Clone, Copy, Debug, Eq, PartialEq)]
     pub struct PteFlagsAarch64: u64 {
         /// * If set, this page is currently "present" in memory. 
         /// * If not set, this page is not in memory, which could mean one of several things:
@@ -52,15 +53,15 @@ bitflags! {
         /// This page maps "normal" memory, i.e., non-device memory.
         ///
         /// Theseus uses `MAIR_INDEX_0` for this type of memory.
-        const NORMAL_MEMORY      = Self::_MAIR_INDEX_0.bits;
+        const NORMAL_MEMORY      = Self::_MAIR_INDEX_0.bits();
         /// Indicates the page's cacheability is described by MAIR Index 1.
         ///
         /// Theseus uses this index for "device" memory.
         const _MAIR_INDEX_1      = 1 << 2;
         /// This page maps device memory, i.e., memory-mapped I/O registers.
         ///
         /// Theseus uses `MAIR_INDEX_1` for this type of memory.
-        const DEVICE_MEMORY      = Self::_MAIR_INDEX_1.bits;
+        const DEVICE_MEMORY      = Self::_MAIR_INDEX_1.bits();
         /// Indicates the page's cacheability is described by MAIR Index 2.
         ///
         /// This is unused in Theseus.
@@ -179,7 +180,7 @@ bitflags! {
         const _USER_EXEC_NEVER   = 1 << 54;
         /// * If set, this page is not executable.
         /// * If not set, this page is executable.
-        const NOT_EXECUTABLE     = Self::_PRIV_EXEC_NEVER.bits | Self::_USER_EXEC_NEVER.bits;
+        const NOT_EXECUTABLE     = Self::_PRIV_EXEC_NEVER.bits() | Self::_USER_EXEC_NEVER.bits();
 
         /// See [PteFlags::EXCLUSIVE].
         ///  We use bit 55 because it is available for custom OS usage on both x86_64 and aarch64.
@@ -217,13 +218,13 @@ impl PteFlagsAarch64 {
     ///       that we don't care about.
     pub const fn new() -> Self {
         Self::from_bits_truncate(
-            Self::NORMAL_MEMORY.bits
-            | Self::OUTER_SHAREABLE.bits
-            | Self::READ_ONLY.bits
-            | Self::PAGE_DESCRIPTOR.bits
-            | Self::ACCESSED.bits
-            | Self::_NOT_GLOBAL.bits
-            | Self::NOT_EXECUTABLE.bits
+            Self::NORMAL_MEMORY.bits()
+            | Self::OUTER_SHAREABLE.bits()
+            | Self::READ_ONLY.bits()
+            | Self::PAGE_DESCRIPTOR.bits()
+            | Self::ACCESSED.bits()
+            | Self::_NOT_GLOBAL.bits()
+            | Self::NOT_EXECUTABLE.bits()
         )
     }
 
@@ -361,7 +362,7 @@ impl PteFlagsAarch64 {
     /// * The three bits `[2:4]` for MAIR index values.
     /// * The two bits `[8:9]` for shareability.
     pub const MASKED_BITS_FOR_CONVERSION: PteFlagsAarch64 = PteFlagsAarch64::from_bits_truncate(
-        SHAREABLE_BITS_MASK.bits | MAIR_BITS_MASK.bits
+        SHAREABLE_BITS_MASK.bits() | MAIR_BITS_MASK.bits()
     );
 
     /// Returns a copy of this `PteFlagsAarch64` with its flags adjusted

kernel/pte_flags/src/pte_flags_x86_64.rs

@@ -22,6 +22,7 @@ bitflags! {
     /// * Bits `[52:62]` (inclusive) are available for custom OS usage.
     /// * Bit  `63` is reserved by hardware for access flags (noexec).
     #[doc(cfg(target_arch = "x86_64"))]
+    #[derive(Clone, Copy, Debug, Eq, PartialEq)]
     pub struct PteFlagsX86_64: u64 {
         /// * If set, this page is currently "present" in memory. 
         /// * If not set, this page is not in memory, which could mean one of several things:
@@ -49,7 +50,7 @@ bitflags! {
         /// that index is used to determine the PAT entry that holds the
         /// memory caching type that is applied to this page.
         const WRITE_THROUGH      = 1 << 3;
-        const PAT_BIT0           = Self::WRITE_THROUGH.bits;
+        const PAT_BIT0           = Self::WRITE_THROUGH.bits();
 
         /// * If set, this page's content is never cached, neither for read nor writes. 
         /// * If not set, this page's content is cached as normal, both for read nor writes. 
@@ -60,8 +61,8 @@ bitflags! {
         /// memory caching type that is applied to this page.
         const CACHE_DISABLE      = 1 << 4;
         /// An alias for [`Self::CACHE_DISABLE`] in order to ease compatibility with aarch64.
-        const DEVICE_MEMORY      = Self::CACHE_DISABLE.bits;
-        const PAT_BIT1           = Self::CACHE_DISABLE.bits;
+        const DEVICE_MEMORY      = Self::CACHE_DISABLE.bits();
+        const PAT_BIT1           = Self::CACHE_DISABLE.bits();
 
         /// * The hardware will set this bit when the page is accessed.
         /// * The OS can then clear this bit once it has acknowledged that the page was accessed,

kernel/text_terminal/Cargo.toml

@@ -5,7 +5,7 @@ authors = ["Kevin Boos <kevinaboos@gmail.com>"]
 description = "A text-based terminal emulator that supports ANSI, VT100, xterm, and other standards."
 
 [dependencies]
-bitflags = "1.1.0"
+bitflags = "2.4.1"
 core2 = { version = "0.4.0", default-features = false, features = ["alloc", "nightly"] }
 unicode-width = "0.1.8"
 vte = "0.10.1"

kernel/text_terminal/src/ansi_style.rs

@@ -419,7 +419,7 @@ bitflags! {
     ///
     /// This set of flags is completely self-contained within each `Unit`
     /// and does not need to reference any previous `Unit`'s flag as an anchor.
-    #[derive(Default)]
+    #[derive(Clone, Copy, Debug, Default, Eq, PartialEq)]
     pub struct FormatFlags: u8 {
         /// If set, this character is displayed in a bright color, which is sometimes called "bold".
         const BRIGHT                    = 1 << 0;

libs/keycodes_ascii/Cargo.toml

@@ -8,7 +8,7 @@ license = "MIT"
 edition = "2021"
 
 [dependencies]
-bitflags = "1.1.0"
+bitflags = "2.4.1"
 
 [dependencies.num_enum]
 version = "0.5.7"

libs/keycodes_ascii/src/lib.rs

@@ -12,6 +12,7 @@ bitflags! {
     /// To save space, this is expressed using bitflags 
     /// rather than a series of individual booleans, 
     /// because Rust's `bool` type is a whole byte.
+    #[derive(Clone, Copy, Debug, Eq, PartialEq)]
     pub struct KeyboardModifiers: u16 {
         const CONTROL_LEFT    = 1 <<  0;
         const CONTROL_RIGHT   = 1 <<  1;