8x PLL Clock Multiplier PLL Design with an input frequency range of 5Mhz to 12.5Mhz and output frequency range of 40Mhz to 100Mhz, giving an 8x multiplied clock at ~50% duty cycle on tt corner at room temperature.
open-source design magic asic gds open-source-project ic open-source-hardware ngspice pll analog-design rtl2gds clock-multiplier google-skywater-pdk charge-pum voltage-controlled-oscillator
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Updated
Jul 21, 2022