Digital logic design tool and simulator

Teaching-focused digital circuit simulator

Here are my GATE CSE 2021 Resources

IceChips is a library of all common discrete logic devices in Verilog

A digital logic simulator inspired by Logisim.

Labs for Computer Science: C, Assembly, Data Structure, CSAPP, HSI, MATLAB, Digital Logic, Verilog, Compilers, Operating Systems

32bit Simplifier of Boolean functions

VHDL code examples for a digital design course

透過數位邏輯結合VHDL與Verilog的過程，作為從基礎數位邏輯到計算機系統結構，並實作出一顆CPU的教學書籍，希望未來可以成為教學範例檔案。目前將開發轉移到GitLab，因為可以呈現數學與MUL圖。

A powerful tool for minimizing Boolean functions

WIP open source tooling for the XC9500 / XC9500XL series of CPLDs from Xilinx.

Simple Java application for simulating digital circuits

A simple 8 bit UART implementation in Verilog, with tests and timing diagrams

Digital Piano: FPGA project in Verilog based on Xilinx Atrix-7 EGO1 - SUSTech's project of course CS207: Digital Logic in Fall 2023 - Score: 120/100

VHDL Code for Labs done in a 2nd year Digital Systems course at Queen's University.

Python digital logic library

Formal verification engine for Verilog with built-in support for simulating flip-flop metastability

An experimental package manager and development tool for Hardware Description Languages (HDL).

Binary adder implementation in the Game of Life written in JavaScript using canvas.

The design and implementation of simple computer by quartus.