logicsynthesis

Here are 2 public repositories matching this topic...

LAKSHMAN1410 / PUF-for-Secure-Hardware-Authentication-FPGA-ASIC-Implementation-

Design and implementation of a hybrid XOR-based Arbiter Physical Unclonable Function (PUF) on FPGA, followed by ASIC synthesis , enabling lightweight and secure hardware authentication with enhanced uniqueness, entropy, and reliability.

asic fpga rtl verilog xilinx uart vlsi basys3 puf gatelevel securehardware logicsynthesis

Updated Feb 17, 2026
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mortimerscattershot606 / PUF-for-Secure-Hardware-Authentication-FPGA-ASIC-Implementation-

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asic fpga rtl verilog xilinx uart vlsi basys3 puf gatelevel securehardware logicsynthesis

Updated Mar 26, 2026
Tcl

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