rv32m

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GabbedT / ApogeoRV

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A RISC-V 32 bits, Out Of Order, single issue with branch prediction CPU, implementing the B, C, M and Zfinx extensions.

asic cpu fpga systemverilog hdl rv32i rv32c rv32m rv32b rv32zfinx

Updated Apr 7, 2025
SystemVerilog

akira2963753 / RISC-V-CPU-on-FPGA

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32-bit Pipelined RISC-V CPU Based on RV32I & RV32M including Forwarding, Hazard, Flush, Brach Predictor and two L1 Cache to transmiss data with BRAM using the AXI bus.

cpu fpga riscv risc-v rv32i riscv32 riscv-cpu rv32m risc-v32 risc-v-processor

Updated Oct 1, 2025
Verilog

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rv32m

Here are 2 public repositories matching this topic...

GabbedT / ApogeoRV

akira2963753 / RISC-V-CPU-on-FPGA

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