Chipyard 1.9.0

Faster FIRRTL builds support with CIRCT. New software support for RISC-V GCC12 and Linux 6.2. Various bumps and fixes of all submodules.

Added

• Add example ring-only NoC Config by @jerryz123 in #1325
• Bump Gemmini by @hngenc, @jerryz123 in #1276 #1326
• Bump FireMarshal, Bump to newer RV toolchain (deprecate use of esp-tools for Gemmini) by @abejgonzalez, @jerryz123 in #1284 #1304 #1306 #1327 #1334 #1335 #1344 #1394 #1403 #1415
• Add support for VC707 FPGA board by @Lorilandly in #1278
• Fail simulations on TSI errors by @tymcauley in #1288
• Add pre-commit support by @abejgonzalez in #1294 #1310
• Bump mempress by @joey0320 in #1305
• CIRCT Integration by @abejgonzalez, @joey0320 in #1239 #1312 #1372 #1396
• Bump to scala 2.13.10/chisel 3.5.5/latest rocketchip by @jerryz123 in #1303
• Spike-as-a-Tile and use for co-simulation by @jerryz123 in #1307 #1323 #1360
• Add clone-tile configs by @jerryz123 in #1322
• New Hammer by @harrisonliew in #1324 #1368 #1374 #1369 #1410
• Config finder make target by @abejgonzalez in #1328 #1381
• Arty100T board + TSI-over-UART by @jerryz123 in #1345
• Add graphml visualization section to docs by @schwarz-em in #1387
• Add a frag./config for MMIO only FireSim bridges by @abejgonzalez in #1393
• Add log of chisel elaboration to generated src by @jerryz123 in #1400
• Xcelium support by @sagark in #1386
• Bump Sodor @a0u in #1338
• Bump Constellation by @jerryz123 in #1339

Changed

• remove RocketTilesKey by @SingularityKChen in #1264
• Move setup script to scripts/, use a symlink at top-level by @jerryz123 in #1271
• Decoupled sbus width from boom|hwacha|gemmini memory interface widths by @jerryz123 in #1273
• Remove conda from build-toolchains-extra.sh by @abejgonzalez in #1266
• Rework build-setup | Add single-node CI by @abejgonzalez in #1282
• Switch simulators to C++17. by @jerryz123 in #1285
• Init FPGA submodules in build-setup.sh by @abejgonzalez in #1292
• Stripped down rocket configs for FireSim testing by @t14916 in #1302
• Add more minimal firesim configs for testing by @t14916 in #1313
• Add workshop info to README.md by @sagark in #1314
• Removed FireSim tests and harnesses by @nandor in #1317
• Move boom's tracegen interface to boom submodule by @jerryz123 in #1331
• Split up RocketConfigs.scala by @jerryz123 in #1340
• Sky130/Openroad Tutorial Fixes by @nayiri-k in #1392
• Testing VLSI commands for chipyard tutorial by @nayiri-k in #1395
• Reduce test cases for noc-config in CI by @jerryz123 in #1359
• Remove TLHelper, directly use tilelink node constructors by @jerryz123 in #1358
• Remove chisel-testers submodule by @abejgonzalez in #1378
• Cache .ivy2 and .sbt within Chipyard root directory by @abejgonzalez in #1362

Fixed

• Remove extra parenthesis by @odxa20 in #1261
• Fixed typo in Initial-Repo-Setup.rst by @PisonJay in #1269
• fix: S-interpolator for assert, assume and printf by @SingularityKChen in #1242
• Revert "fix: S-interpolator for assert, assume and printf" by @jerryz123 in #1272
• changelog: fixed TinyRocketArtyConfig FPGA reset signal polarity (Please Backport) by @T-K-233 in #1257
• Fix CY logo in README by @abejgonzalez in #1295
• More files to gitignore by @abejgonzalez in #1297
• Bump rocket-dsp-utils for ShiftRegisterMem fix. by @milovanovic in #1298
• Set VLOGMODEL=MODEL by default in variables.mk by @jerryz123 in #1337
• Fix compile breaking due to merge conflict by @jerryz123 in #1321
• Makefile bug fixes by @abejgonzalez in #1336
• Fix Verilog Prerequisites + Ignore mv stdout by @abejgonzalez in #1406
• Fix Chisel hierarchy API - Fixes #1356 by @abejgonzalez in #1361
• Remove gen-collateral when rebuilding by @joey0320 in #1342
• Fix VLSI input files list emission to avoid bash "too many arguments" error by @sagark in #1348
• Small build system improvements by @abejgonzalez in #1349
• Fix socket name length issues on CI by @jerryz123 in #1353
• Fix TestDriver.v missing from gen-collateral after recompiling by @joey0320 in #1354
• Consolidate CI testing configs to improve CI runtime by @jerryz123 in #1352
• Remove Duplicate Compiler Flags by @joey0320 in #1351
• fpga makefile clean fix by @joey0320 in #1357
• Fix newline in message in build-setup.sh by @jerryz123 in #1365
• Update assert message if configs can't be split by : by @abejgonzalez in #1373
• Remove Duplicate Compiler Flags by @joey0320 in #1367
• Move more tmp/ folders to a unique location by @abejgonzalez in #1382
• Remove stale conda env's after 2 days by @abejgonzalez in #1389
• Match CY/FireSim deps | Unpin deps | Update lockfiles by @abejgonzalez in #1391
• Only support HTML docs by @abejgonzalez in #1401
• Only HTML docs v2 by @abejgonzalez in #1402
• Fix ANSI color output by @jerryz123 in #1407
• Fix chisel elab errors not causing flow to stop by @jerryz123 in #1409
• lean gemmini tutorial by @sagark in #1413