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1. bist-verilog bist-verilog Public

   Implementation of built in self test done as part of course project

   Verilog 1 1

2. deductive-fault-sim deductive-fault-sim Public

   Python code for deductive fault simulation in digital VLSI testing

   Python 1

3. set-associative-cache set-associative-cache Public

   Implementation of 4 way Set Associative Cache with LRU Replacement Policy in VHDL

   VHDL

4. parallel-dec-multiplier parallel-dec-multiplier Public

   Partial Product Generation of Radix-10 Parallel Decimal Multiplier in Verilog

   Verilog

5. verilog-sample-codes verilog-sample-codes Public

   Verilog codes for simple digital circuits as part of college course

   Verilog