Added srecord output support. Added RX GPIO registers. Fixed startup …

…code for jump and gate switching to user mode if not already in it (so code works in test-app).

Makefile

@@ -262,11 +262,16 @@ $(LSCRIPT): $(LSCRIPT_IN) FORCE
 		> $@
 
 hex: wolfboot.hex
+srec: wolfboot.srec
 
 %.hex:%.elf
 	@echo "\t[ELF2HEX] $@"
 	@$(OBJCOPY) -O ihex $^ $@
 
+%.srec:%.elf
+	@echo "\t[ELF2SREC] $@"
+	@$(OBJCOPY) -O srec $^ $@
+
 src/keystore.c: $(PRIVATE_KEY)
 
 keys: $(PRIVATE_KEY)

docs/Targets.md

@@ -1942,7 +1942,7 @@ sudo udevadm control --reload-rules
 
 ### Debugging Renesas RX65N in e2Studio:
 
-Create a new "Renesas Debug" project. Choose the "E2 Lite" emulator and the built `wolfboot.elf`. After project is created open the "Debug Configuration" and change the debugger interface from "JTAG" to "FINE". Run debug and it will stop in the "reset" code in `boot_renesas_start.S`.
+Create a new "Renesas Debug" project. Choose the "E2 Lite" emulator and the built `wolfboot.elf`. After project is created open the "Debug Configuration" and change the debugger interface from "JTAG" to "FINE". Run debug and it will stop in the "reset" code in `boot_renesas_start.S`. If using Big Endian change endianess mode in "Debugger -> Debug Tool Settings -> Memory Endian -> Big Endian".
 
 ### Debugging Renesas RX65N in terminal:
 

hal/rx65n.c

@@ -162,9 +162,16 @@
 #define MPC_PFS(n) (*(volatile uint8_t *)(0x8C0E0 + (n)))
 
 /* Ports */
-#define PORT_BASE(n) (0x8C000 + (n))
-#define PORT_PDR(n)  (*(volatile uint8_t*)(0x8C000 + (n)))
-#define PORT_PMR(n)  (*(volatile uint8_t*)(0x8C060 + (n))) /* 0=General, 1=Peripheral */
+#define PORT_BASE    (0x8C000)
+#define PORT_PDR(n)  (*(volatile uint8_t*)(PORT_BASE + 0x00 + (n))) /* Port Direction Register: 0=Input, 1=Output */
+#define PORT_PODR(n) (*(volatile uint8_t*)(PORT_BASE + 0x20 + (n))) /* Port Output Data Register: 0=Low, 1=High */
+#define PORT_PIDR(n) (*(volatile uint8_t*)(PORT_BASE + 0x40 + (n))) /* Port Input Register: 0=Low input, 1=Hight Input */
+#define PORT_PMR(n)  (*(volatile uint8_t*)(PORT_BASE + 0x60 + (n))) /* Port Mode Register: 0=General, 1=Peripheral */
+#define PORT_ODR(n)  (*(volatile uint8_t*)(PORT_BASE + 0x80 + (n))) /* Open-Drain Control Register: 0=CMOS, 1=NMOS open-drain */
+#define PORT_PCR(n)  (*(volatile uint8_t*)(PORT_BASE + 0xC0 + (n))) /* Pull-Up Resistor Control Register: 0=Disable pull-up, 1=Enable input pull-up */
+#define PORT_DSCR(n) (*(volatile uint8_t*)(PORT_BASE + 0xE0 + (n))) /* Drive Capacity Control Register: 0=Normal, 1=High-drive output */
+
+/* SPI Flash (N25Q032) on SCI1 SCK=P27, MOSI=P26, MISO=P30, SS=P31 */
 
 
 static void hal_delay_us(uint32_t us)

hal/rx65n.ld

@@ -126,6 +126,7 @@ SECTIONS
     .bss :
     {
         _bss = .;
+        *(.dynbss)
         *(.bss)
         *(.bss.**)
         *(COMMON)

options.mk

@@ -742,7 +742,9 @@ endif
 CFLAGS+=$(CFLAGS_EXTRA)
 
 ifeq ($(USE_GCC_HEADLESS),1)
-  CFLAGS+="-Wstack-usage=$(STACK_USAGE)"
+  ifneq ($(ARCH),RENESAS_RX)
+    CFLAGS+="-Wstack-usage=$(STACK_USAGE)"
+  endif
 endif
 
 ifeq ($(SIGN_ALG),)

src/boot_renesas.c

@@ -57,7 +57,10 @@ void do_boot(const uint32_t *app_offset)
     #if defined(__CCRX__)
         longJump(app_offset);
     #else
-        __asm("jmp   r1");
+        /* address at r1 is the function table, so load value from r1 */
+        __asm("mov.l [r1], r2");
+        /* jump to address */
+        __asm("jmp   r2");
     #endif
 #elif defined(_RENESAS_RA_)
     app_sp = VECTOR_SP;
@@ -781,30 +784,30 @@ const unsigned long __ofsm_sec_ofs1[] OFS_REG = {
     __OFS1_VALUE,
 };
 
-// TMINF register
+/* TMINF register */
 const unsigned long __TMINFreg OFS_TMINF = 0xffffffff;
 
-// BANKSEL register
+/* BANKSEL register */
 const unsigned long __BANKSELreg OFS_BANKSEL = 0xffffffff;
 
-// SPCC register
+/* SPCC register */
 const unsigned long __SPCCreg OFS_SPCC = 0xffffffff;
 
-// TMEF register
+/* TMEF register */
 const unsigned long __TMEFreg OFS_TMEF = 0xffffffff;
 
-// OSIS register (ID codes)
+/* OSIS register (ID codes) */
 const unsigned long __OSISreg[4] OFS_OSIS = {
     0xffffffff,
     0xffffffff,
     0xffffffff,
     0xffffffff,
 };
 
-// FAW register
+/* FAW register */
 const unsigned long __FAWreg OFS_FAW = 0xffffffff;
 
-// RCP register
+/* RCP register */
 const unsigned long __RCPreg OFS_RCP = 0xffffffff;
 #endif /* WOLFBOOT_RENESAS_OSM */
 

src/boot_renesas_start.S

@@ -65,19 +65,22 @@ _PowerON_Reset :
 2:
 #endif
 
-/* setup PSW */
-    mvtc    #10000h, psw   /* Set Ubit & Ibit for PSW */
-
-/* change PSW PM to user-mode */
+/* check and skip PSW setup if already in "user mode" */
     mvfc   psw, r1
-    or     #00100000h, r1
+    btst   #20, r1 /* Processor Mode: 0=Supervisor, 1=User */
+    bne    skip_psw_setup
+
+/* change PSW Processor Mode (PM) to user-mode */
+    mvtc   #10000h, psw   /* Set Interupt Enable bit */
+    or     #00100000h, r1 /* Set PM = 1 (user mode) */
     push.l r1
     mvfc   pc, r1
     add    #10, r1
     push.l r1
     rte
     nop
     nop
+skip_psw_setup:
 
 /* start user program */
     mov    #_main, r7

test-app/Makefile

@@ -360,6 +360,14 @@ image.bin: image.elf
 	@echo "\t[BIN] $@"
 	$(Q)$(OBJCOPY) $(OBJCOPY_FLAGS) -O binary $^ $@
 
+image.hex: image.elf
+	@echo "\t[HEX] $@"
+	$(Q)$(OBJCOPY) $(OBJCOPY_FLAGS) -O ihex $^ $@
+
+image.srec: image.elf
+	@echo "\t[SREC] $@"
+	$(Q)$(OBJCOPY) $(OBJCOPY_FLAGS) -O srec $^ $@
+
 image.elf: $(APP_OBJS) $(LSCRIPT)
 	@echo "\t[LD] $@"
 	$(Q)$(LD) $(LDFLAGS) $(APP_OBJS) $(OUTPUT_FLAG) $@