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add time clock to runtime #170

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Mar 8, 2021
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2955bca
added a main_clock with dimension 'mclock' to initialize context, thi…
Feb 8, 2021
770d1ec
fixed black
Feb 8, 2021
7b0326e
changed 'master' to 'main' everywhere except in non-breaking testcases.
Feb 8, 2021
7384b47
fixed space and undid changes of access-clock
Feb 8, 2021
d8165be
added placeholder
Feb 8, 2021
d2a3030
fixed black (again)
Feb 8, 2021
bc26be9
added master_clock_dim + tests, master_clock_coords no tests
Feb 9, 2021
95a4b4d
Update xsimlab/xr_accessor.py
feefladder Feb 9, 2021
76033e8
Update xsimlab/xr_accessor.py
feefladder Feb 9, 2021
2214139
Update xsimlab/xr_accessor.py
feefladder Feb 9, 2021
570489e
added master/main_clock_coord access tests, updated whats-new
Feb 9, 2021
800f2b8
Merge branch 'master-main' of github.com:Joeperdefloep/xarray-simlab …
Feb 9, 2021
6f38346
removed vscode settings
Feb 9, 2021
13f0045
created duck-typed singleton class for main clock and managed access
Feb 9, 2021
6aa4f37
stuck at 'store_output_vars' has unmatching dimensions
Feb 9, 2021
5f1f6a8
Apply suggestions from code review
feefladder Feb 10, 2021
6c5a223
removed raise checks from test_update_clocks_master_clock_warning
Feb 10, 2021
605594d
Merge branch 'master-main' of github.com:Joeperdefloep/xarray-simlab …
Feb 10, 2021
a9dabac
removed raises in test_update_clocks_master_warning
Feb 10, 2021
1589466
removed redundancy in test_update_master_clock
Feb 10, 2021
cceed31
properly implemented singleton, should work now
Feb 10, 2021
10673e9
added tests
Feb 10, 2021
1d11793
added check for double dimensions.
Feb 10, 2021
60127a7
Merge branch 'access-clock' into master-main
feefladder Feb 10, 2021
5e0f75c
Merge pull request #1 from Joeperdefloep/master-main
feefladder Feb 10, 2021
404cddd
Merge branch 'master' into access-clock
feefladder Feb 10, 2021
482c1f9
stuff, deleted prints
Feb 10, 2021
16330bd
Update xsimlab/utils.py
feefladder Feb 11, 2021
0abba09
Update xsimlab/variable.py
feefladder Feb 11, 2021
2b05f12
better tests
Feb 11, 2021
9be2a50
Merge branch 'access-clock' of github.com:Joeperdefloep/xarray-simlab…
Feb 11, 2021
90b0463
black...
Feb 11, 2021
097a9aa
stupid test solved
Feb 11, 2021
a0d80c0
Update xsimlab/xr_accessor.py
feefladder Feb 19, 2021
5bc5b6e
Update xsimlab/tests/test_model.py
feefladder Feb 19, 2021
d8a1fa9
did some stuff
Feb 19, 2021
c9139ca
Merge branch 'access-clock' of github.com:Joeperdefloep/xarray-simlab…
Feb 19, 2021
5f84d67
should be good
Feb 19, 2021
08a17e8
docs
Mar 2, 2021
fc4d3dd
updated what's new
Mar 4, 2021
6d9ffa7
Merge branch 'master' into access-clock
benbovy Mar 8, 2021
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3 changes: 0 additions & 3 deletions xsimlab/drivers.py
Original file line number Diff line number Diff line change
Expand Up @@ -209,9 +209,6 @@ def _maybe_transpose(dataset, model, check_dims, batch_dim):
if xr_var is None:
continue

if any([MAIN_CLOCK in d for d in model.cache[var_key]["metadata"]["dims"]]):
raise ValueError("Do not pass xs.MAIN_CLOCK into input vars dimensions")

# all valid dimensions in the right order
dims = [list(d) for d in model.cache[var_key]["metadata"]["dims"]]
dims += [[dataset.xsimlab.main_clock_dim] + d for d in dims]
Expand Down
61 changes: 37 additions & 24 deletions xsimlab/tests/test_model.py
Original file line number Diff line number Diff line change
Expand Up @@ -462,17 +462,30 @@ class Foo:

@xs.runtime(args=["main_clock_values", "main_clock_dataarray"])
def initialize(self, clock_values, clock_array):
self.a = clock_values
assert all(self.a == [0, 1, 2, 3])
self.a = clock_values * 2
assert all(self.a == [0, 2, 4, 6])
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self.b = clock_array * 2
assert clock_array.dims[0] == "clock"
assert all(clock_array[clock_array.dims[0]].data == [0, 1, 2, 3])

@xs.runtime(args=["step_delta", "step"])
def run_step(self, dt, n):
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You could remove dt if you don't use it.

assert self.a[n] == 2 * n
self.a[n] += 1

model = xs.Model({"foo": Foo})
ds_in = xs.create_setup(
model=model, clocks={"clock": [0, 1, 2, 3]}, input_vars={}, output_vars={}
model=model,
clocks={"clock": range(4)},
input_vars={},
output_vars={"foo__a": None},
)
ds_in.xsimlab.run(model=model)
ds_out = ds_in.xsimlab.run(model=model)
assert all(ds_out.foo__a.data == [1, 3, 5, 6])

# TODO: there is still the problem that the first (0) value of the clock is
# set to np.nan in output (still works fine in input) Also, getting
# time variables as DataArray as output is not working
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# test for error when another dim has the same name as xs.MAIN_CLOCK
@xs.process
Expand All @@ -486,27 +499,27 @@ def run_step(self):
self.a += self.a

model = xs.Model({"foo": DoubleMainClockDim})
# with pytest.raises(ValueError,match="")
xs.create_setup(
model=model,
clocks={"clock": [0, 1, 2, 3]},
input_vars={},
output_vars={},
).xsimlab.run(model)
with pytest.raises(ValueError, match=r"Main clock:*"):
xs.create_setup(
model=model,
clocks={"clock": [0, 1, 2, 3]},
input_vars={},
output_vars={"foo__a": None},
).xsimlab.run(model)

# test for error when trying to put xs.MAIN_CLOCK as a dim in an input var
@xs.process
class InputMainClockDim:
a = xs.variable(intent="in", dims=xs.MAIN_CLOCK)

model = xs.Model({"foo": InputMainClockDim})
ds_in = xs.create_setup(
model=model,
clocks={"clock": [0, 1, 2, 3]},
input_vars={"foo__a": 5},
output_vars={},
)
with pytest.raises(
ValueError, match="Do not pass xs.MAIN_CLOCK into input vars dimensions"
):
ds_in.xsimlab.run(model=model)
with pytest.raises(
ValueError, match="Do not pass xs.MAIN_CLOCK into input vars dimensions"
):
a = xs.variable(intent="in", dims=xs.MAIN_CLOCK)

with pytest.raises(
ValueError, match="Do not pass xs.MAIN_CLOCK into input vars dimensions"
):
b = xs.variable(intent="in", dims=(xs.MAIN_CLOCK,))
with pytest.raises(
ValueError, match="Do not pass xs.MAIN_CLOCK into input vars dimensions"
):
c = xs.variable(intent="in", dims=["a", ("a", xs.MAIN_CLOCK)])
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4 changes: 2 additions & 2 deletions xsimlab/tests/test_xr_accessor.py
Original file line number Diff line number Diff line change
Expand Up @@ -158,9 +158,9 @@ def test_master_clock_coords_warning(self):
)
with pytest.warns(
FutureWarning,
match="master_clock is to be deprecated in favour of main_clock",
match="master_clock_coord is to be deprecated in favour of main_clock",
):
xr.testing.assert_equal(ds.xsimlab.master_clock_coord, ds.mclock)
ds.xsimlab.master_clock_coord

def test_clock_sizes(self):
ds = xr.Dataset(
Expand Down
10 changes: 7 additions & 3 deletions xsimlab/utils.py
Original file line number Diff line number Diff line change
Expand Up @@ -16,8 +16,12 @@


class _MainClockDim:
"""singleton class to be used as main clock dimension: update on runtime
it has all behaviour that dimensions in a `xr.DataArray` normally have.
"""Singleton class to be used as a placeholder of the main clock
dimension.

It will be replaced by the actual dimension label set during simulation setup
(i.e., ``main_clock`` argument).

"""

_singleton = None
Expand All @@ -29,7 +33,7 @@ def __new__(cls):
return _MainClockDim._singleton

def __repr__(self):
return "MAIN_CLOCK (uninitialized)"
return "MAIN_CLOCK (undefined)"


MAIN_CLOCK = _MainClockDim()
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It would be nice to add some docstrings for this attribute, e.g.,

MAIN_CLOCK = _MainClockDim()
"""
Sentinel to indicate simulation's main clock dimension, to be
replaced by the actual dimension label set in input/output datasets.
"""

and add it in the docs (probably in API references in the variables section, since we would use it when declaring variables).

Expand Down
12 changes: 9 additions & 3 deletions xsimlab/variable.py
Original file line number Diff line number Diff line change
Expand Up @@ -58,14 +58,17 @@ def _as_dim_tuple(dims):

"""
# MAIN_CLOCK is sentinel and does not have length (or zero), so check explicitly
if dims == MAIN_CLOCK:
if dims is MAIN_CLOCK:
dims = [(dims,)]
elif not len(dims):
dims = [()]
elif isinstance(dims, str):
dims = [(dims,)]
elif isinstance(dims, list):
dims = [tuple([d]) if isinstance(d, str) else tuple(d) for d in dims]
dims = [
tuple([d]) if (isinstance(d, str) or d is MAIN_CLOCK) else tuple(d)
for d in dims
]
else:
dims = [dims]

Expand Down Expand Up @@ -224,6 +227,9 @@ def variable(
else:
_init = True
_repr = True
# also check if MAIN_CLOCK is there
if any([MAIN_CLOCK in d for d in metadata["dims"]]):
raise ValueError("Do not pass xs.MAIN_CLOCK into input vars dimensions")

return attr.attrib(
metadata=metadata,
Expand Down Expand Up @@ -342,7 +348,7 @@ def on_demand(
Dictionary specifying how to encode this variable's data into a
serialized format (i.e., as a zarr dataset). Currently used keys
include 'dtype', 'compressor', 'fill_value', 'order', 'filters'
and 'object_codec'. See :func:`zarr.creation.create` for details
and 'object_codec'. See :func:`zarr.creation.df` for details
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about these options. Other keys are ignored.

Notes
Expand Down
1 change: 1 addition & 0 deletions xsimlab/xr_accessor.py
Original file line number Diff line number Diff line change
Expand Up @@ -212,6 +212,7 @@ def master_clock_coord(self):
"master_clock_coord is to be deprecated in favour of main_clock",
FutureWarning,
)
warnings.warn("Poep in je hoofd!")
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return self.main_clock_coord

@property
Expand Down