Hardware implementation of Motion Estimation algorithm written in Verilog-HDL.
- About Motion Estimation
- Description
- Required Tools
- How to Run Simulation
- How to Implement Motion Estimation Hardware
- Directory Structure
- Behavioral Simulation Result
- Python Result
- Block Diagrams
- Source Files
- To Do
Motion Estimation is a process of finding motion vectors from a reference frame to the current frame. This process involves the following steps for each macro block in the current frame:
- Find a block with the lowest matching error in the search window of the reference frame.
- Use the sum of absolute difference (SAD) between corresponding pixels.
- The displacement between the current macro block and the best matching macro block is the motion vector.
- Search Memory Window: 31x31 pixels
- Reference Memory Block: 16x16 pixels
- Parallel Processing: 16 Processing Elements
- Clock Frequency: 31.25 MHz
- Post-Implementation: Nexys-A7-100T FPGA board
- Go to the
/testbench/testcase/
directory and run the/testbench/testcase/randblock_gen.py
script. - After running the script, execute
/testbench/testcase/min_SAD.py
to generate the/testbench/testcase/min_SAD.txt
file. - Add the
/testbench/testcase/SearchWindowMemory_hw.txt
,/testbench/testcase/ReferenceBlock_hw.txt
, and/testbench/testcase/min_SAD.txt
files as simulation files in your VIVADO project. - Finally, run the
/testbench/ME_tb.v
file.
- Go to the
/constraint
directory. - Add the constraint file to the relevant VIVADO project as a constraint file.
- Add the source files from the
/rtl
directory and setMotionEstimationTop.v
as the top module. - Run the implementation.
The Motion Estimation Processor source code is organized as follows:
/docs project report
/constraint constraint file
/rtl RTL files for Motion Estimation Processor
/testbench testbench source and testcase files
- SearchWindowMemory.v: Implements the memory that stores the search window data used in the motion estimation process.
- ReferenceBlockMemory.v: Stores the reference block data that is compared against the search window data during motion estimation.
- ControlUnit.v: Manages the control signals for coordinating the operations of different components in the motion estimation hardware.
- Datapath.v: Defines the data path for processing the input data, performing the necessary computations for motion estimation.
- InstantMinComp.v: Computes the minimum value instantaneously, used for determining the best match in motion estimation.
- MinTrackerComp.v: Tracks the minimum values over multiple comparisons to find the optimal motion vector.
- MotionEstimationTop.v: Top-level module that integrates all submodules and coordinates the overall motion estimation process.
- ProcessingElements.v: Contains the array of processing elements that perform the core computations for motion estimation, such as calculating the Sum of Absolute Differences (SAD).
- randblock_gen.py: Generates random blocks for use in motion estimation testing.
- min_SAD.py: Computes the minimum Sum of Absolute Differences (SAD) in software for comparison with hardware results.
- ME_tb.v: Testbench for the Motion Estimation hardware. It initializes signals, loads data from text files into memories, and compares hardware and software results.
- SearchWindowMemory_hw.txt: Contains binary data for initializing the search window memory in the testbench.
- ReferenceBlock_hw.txt: Contains binary data for initializing the reference block memory in the testbench.
- SearchWindowMemory_sw.txt: Contains decimal data for initializing the search window memory in the software.
- ReferenceBlock_sw.txt: Contains decimal data for initializing the reference block memory in the software.
- min_SAD.txt: Contains the expected minimum SAD value calculated by the software for comparison with the hardware result.
- Make scalable (parametric) structure: Refactor the design to be scalable and parameterizable to support various configurations.
- Demo on FPGA: Demonstrate the working of the motion estimation hardware on an FPGA.
- Make configurable: Ensure the hardware is configurable to support different parameters and use cases.