stm32: pm: Enable to driver JTAG port pns to analog when not required #63495
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| #include <zephyr/drivers/gpio.h> | ||
| #include <zephyr/init.h> | ||
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| #if !defined(CONFIG_DEBUG) && defined(CONFIG_PM) |
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is CONFIG_PM a strict condition here?
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If CONFIG_PM is not a condition, it would mean that you can't use gdb unless CONFIG_DEBUG is set, which is not a condition today.
I already foresee that I will get tens of questions around this..
Using CONFIG_PM, I don't break anything as gdb can't be used today with CONFIG_PM unless CONFIG_DEBUG is set.
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OpenOCD can now be used to flash and debug nucleo_wba52cg. However it required use of STMicroelectronics OpenOCD fork. Add instructions on how to use it. Signed-off-by: Erwan Gouriou <erwan.gouriou@st.com>
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| &debug_jtdi_pa15 &debug_jtdo_swo_pb3 | ||
| &debug_jtrst_pb4>; | ||
| pinctrl-1 = <&analog_pa13 &analog_pa14 &analog_pa15 | ||
| &analog_pb3 &analog_pb4>; |
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I'm not sure the dtsi is the best place to put that since the pins can be used for something else than debug.
For example, in the nucleo_wba55cg.dts, PA15, PB3 and PB4 are used for SPI1. Depending on the order of initialization, I think it could result in drivers not functioning.
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Right, so we should make sure this is done before configuring any other device and change priority
SW/JTAG signals description are useful when we don't need them. Signed-off-by: Erwan Gouriou <erwan.gouriou@st.com>
At chip startup, jtag pins are configured by default to enable debug. This configuration adds consumption and when using PM profile, we can save ~40uA by resetting this configuration and setting pins to analog mode. Signed-off-by: Erwan Gouriou <erwan.gouriou@st.com>
Provide jtag port pins description, so they can be used to be set in analog mode when not required to save power (around 40uA saved in total). Signed-off-by: Erwan Gouriou <erwan.gouriou@st.com>
In some cases, PINCTRL_STATE_SLEEP may be required even when CONFIG_PM_DEVICE is not defined. One example is the possibility/need to put JTAG pins to analog when CONIG_PM=y and CONFIG_DEBUG=n. Signed-off-by: Erwan Gouriou <erwan.gouriou@st.com>
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@gautierg-st PTAL |
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During the migration to Hw model V2 the PR zephyrproject-rtos#63495 was not fully reported. This change is adding the support Serial Wire / JTAG port pins Signed-off-by: Francois Ramu <francois.ramu@st.com>
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During the migration to Hw model V2 the PR #63495 was not fully reported. This change is adding the support Serial Wire / JTAG port pins Signed-off-by: Francois Ramu <francois.ramu@st.com>
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During the migration to Hw model V2 the PR zephyrproject-rtos#63495 was not fully reported. This change is adding the support Serial Wire / JTAG port pins Signed-off-by: Francois Ramu <francois.ramu@st.com>
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Configuring JTAG port pins in analog when not required (build time) can save few uA.
Requires #64109
Note:
This operation can also be done using pinctrl API, which would allow dynamic handling of the pins (JTAG function are alternate functions which can't be configured using GPIO API)
Main reason to push this PR using GPIO API is that this is my first shot at this. If everyone agrees this is good enough, this is fine with me