fixed outputs

NYU-Processor-Design · Feb 12, 2024 · 208f44f · 208f44f
1 parent a5846f6
commit 208f44f
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Showing 3 changed files with 5 additions and 5 deletions.
diff --git a/dv/exmem.cpp b/dv/exmem.cpp
@@ -32,7 +32,7 @@ std::uint32_t rs2d, bool reset) {
     nyu::eval(exmem);
   }
 
-  INFO("Testing rdn_in = " << rdn_in << ", alu_out_in = " << alu_out_in << ", and rs2d = " << rs2d);
+  INFO("Testing rdn_in = " << rdn_in << ", alu_out_in = " << alu_out_in << ", and rs2d = " << (int) rs2d);
 
   if (reset) {
   REQUIRE(exmem.rdn == 0);

diff --git a/dv/gpr.cpp b/dv/gpr.cpp
@@ -47,7 +47,7 @@ static void eval_rstn() {
   gpr.rstn = 0;
   nyu::eval(gpr);
 
-  for(std::uint8_t rs1n {0}; (std::string) rs1n < 32; ++rs1n) {
+  for(std::uint8_t rs1n {0}; rs1n < 32; ++rs1n) {
     INFO("Testing Register " << (int) rs1n);
     REQUIRE(read(gpr, rs1n, 0).first == 0);
   }
@@ -68,9 +68,9 @@ static void eval(std::uint32_t reg_vals[32], bool test_wbe) {
   for(std::uint8_t rs1n {0}; rs1n < 32; ++rs1n)
     for(std::uint8_t rs2n {0}; rs2n < 32; ++rs2n) {
       read_vals = read(gpr, rs1n, rs2n);
-      INFO("Testing rs1n = " << rs1n << ", rs2n = " << rs2n);
+      INFO("Testing rs1n = " << (int) rs1n << ", rs2n = " << (int) rs2n);
       REQUIRE(read_vals.first == reg_vals[rs1n] * (bool) rs1n);
-      REQUIRE(read_vals.second == reg_vals[rs2n] * (bool) rs1n);
+      REQUIRE(read_vals.second == reg_vals[rs2n] * (bool) rs2n);
     }
 }
 

diff --git a/dv/memwb.cpp b/dv/memwb.cpp
@@ -31,7 +31,7 @@ static void eval_p(std::uint8_t wbs, std::uint8_t rdn_in,
         memwb.mrd = mrd;
         memwb.alu_out = alu_out;
         nyu::eval(memwb);
-        INFO("Testing wbs + " << wbs << ", rdn_in = " << rdn_in << ", alu_out = " << alu_out << ", and mrd = " << mrd);
+        INFO("Testing wbs + " << wbs << ", rdn_in = " << (int) rdn_in << ", alu_out = " << alu_out << ", and mrd = " << mrd);
         REQUIRE((uint8_t) memwb.rdn == (uint8_t) rdn_in);
     }