tests: various test fixes and speedups

NYU-Processor-Design · May 4, 2024 · 9c7b3e7 · 9c7b3e7
1 parent 3a60d44
commit 9c7b3e7
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Showing 13 changed files with 115 additions and 93 deletions.
diff --git a/dv/CMakeLists.txt b/dv/CMakeLists.txt
@@ -5,12 +5,12 @@ add_executable(tests)
 target_sources(tests PRIVATE
 
 
-con_ex.cpp alu.cpp con_branch_cont.cpp branch_eval.cpp pc.cpp ifid.cpp memwb.cpp gpr.cpp exmem.cpp branch_addr_calc.cpp idex.cpp branch_predictor.cpp pipeline_reset.cpp branch_manager.cpp data_cache_manager.cpp l1_data_cache.cpp
+con_id.cpp con_ex.cpp alu.cpp con_branch_cont.cpp branch_eval.cpp pc.cpp ifid.cpp memwb.cpp gpr.cpp exmem.cpp branch_addr_calc.cpp idex.cpp branch_predictor.cpp pipeline_reset.cpp branch_manager.cpp data_cache_manager.cpp l1_data_cache.cpp
 
 )
 nyu_link_sv(tests PRIVATE core)
 nyu_target_verilate(tests
-  TOP_MODULES Con_EX Alu Con_Branch_Cont Branch_Eval PC IFID MEMWB GPR EXMEM Branch_Addr_Calc IDEX Branch_Predictor Pipeline_Reset Branch_Manager Data_Cache_Manager L1_Data_Cache
+  TOP_MODULES Con_ID Con_EX Alu Con_Branch_Cont Branch_Eval PC IFID MEMWB GPR EXMEM Branch_Addr_Calc IDEX Branch_Predictor Pipeline_Reset Branch_Manager Data_Cache_Manager L1_Data_Cache
 
   ARGS COVERAGE TRACE_FST
 )

diff --git a/dv/branch_addr_calc.cpp b/dv/branch_addr_calc.cpp
@@ -26,9 +26,9 @@ static void eval(bool mode, bool taken, std::uint32_t imm, std::uint32_t rs1d, s
 }
 
 static void test(bool mode, bool taken) {
-    for(std::uint32_t imm {0}; imm < 128; ++imm)
-        for(std::uint32_t rs1d {0}; rs1d < 128; ++rs1d)
-            for(std::uint32_t pc_in {0}; pc_in < 128; ++pc_in)
+    for(std::uint32_t imm {0}; imm < 32; ++imm)
+        for(std::uint32_t rs1d {0}; rs1d < 32; ++rs1d)
+            for(std::uint32_t pc_in {0}; pc_in < 32; ++pc_in)
                 eval(mode, taken, imm, rs1d, pc_in);
 
     for(std::uint32_t imm {1}; imm; imm <<= 1)
@@ -38,18 +38,18 @@ static void test(bool mode, bool taken) {
 }
 
 
-TEST_CASE("PC No Branch") {  //Case when branch_addr = pc + imm, but branch is not taken (addr mode 0, taken 0)
+TEST_CASE("Branch Address Calculator, PC No Branch") {  //Case when branch_addr = pc + imm, but branch is not taken (addr mode 0, taken 0)
    test(0, 0);
 }
 
-TEST_CASE("PC Branch") { //Case when branch_addr = pc + imm, and branch is taken (addr mode 0, taken 1)
+TEST_CASE("Branch Address Calculator, PC Branch") { //Case when branch_addr = pc + imm, and branch is taken (addr mode 0, taken 1)
     test(0, 1);
 }
 
-TEST_CASE("RS1D No Branch") { //Case when branch_addr = imm + rs1d, but branch is not taken (addr mode 1, taken 0)
+TEST_CASE("Branch Address Calculator, RS1D No Branch") { //Case when branch_addr = imm + rs1d, but branch is not taken (addr mode 1, taken 0)
     test(1, 0);
 }
 
-TEST_CASE("RS1D Branch") { //Case when branch_addr = rs1d, and branch is taken (addr mode 1, taken 1)
+TEST_CASE("Branch Address Calculator, RS1D Branch") { //Case when branch_addr = rs1d, and branch is taken (addr mode 1, taken 1)
    test(1, 1);
 }
diff --git a/dv/branch_eval.cpp b/dv/branch_eval.cpp
@@ -34,25 +34,25 @@ static void eval(uint8_t cond, std::uint32_t alu_out) {
 
 
 static void test(std::uint8_t cond) {
-    for(std::uint32_t alu_out {0}; alu_out < 2048; ++alu_out)
+    for(std::uint32_t alu_out {0}; alu_out < 512; ++alu_out)
         eval(cond, alu_out);
 
     for(std::uint32_t alu_out {1}; alu_out; alu_out <<= 1)
         eval(cond, alu_out);
 }
 
-TEST_CASE("Never Branch") {  //Case when non branching instruction
+TEST_CASE("Branch Evaluator, Never Branch") {  //Case when non branching instruction
     test(0);
 }
 
-TEST_CASE("Branch if ALU_OUT is Non-Zero") { //Case when branch condition is < or !=
+TEST_CASE("Branch Evaluator, Branch if ALU_OUT is Non-Zero") { //Case when branch condition is < or !=
     test(1);
 }
 
-TEST_CASE("Branch if ALU_OUT is Zero") { //Case when branch condition is >= or =
+TEST_CASE("Branch Evaluator, Branch if ALU_OUT is Zero") { //Case when branch condition is >= or =
     test(2);
 }
 
-TEST_CASE("Always Branch") { //Case when jump instruction
+TEST_CASE("Branch Evaluator, Always Branch") { //Case when jump instruction
    test(3);
 }
diff --git a/dv/branch_manager.cpp b/dv/branch_manager.cpp
@@ -53,8 +53,8 @@ static void test() {
     auto& bman {nyu::getDUT<VBranch_Manager>()};
 
     init(bman);
-    for(std::uint32_t pred_pc {0}; pred_pc < 128; ++pred_pc)
-        for(std::uint32_t pred_addr {0}; pred_addr < 128; ++pred_addr)
+    for(std::uint32_t pred_pc {0}; pred_pc < 32; ++pred_pc)
+        for(std::uint32_t pred_addr {0}; pred_addr < 32; ++pred_addr)
             for(int pred_taken {0}; pred_taken < 2; ++pred_taken)
                 for(int act_taken {0}; act_taken < 2; ++act_taken)
                     eval(bman, pred_taken, act_taken, pred_pc, pred_addr);

diff --git a/dv/branch_predictor.cpp b/dv/branch_predictor.cpp
@@ -66,10 +66,10 @@ static void test(bool pred) {
             }
 }
 
-TEST_CASE("Non Prediction Instruction") { //branch_occr = 0 or 1
+TEST_CASE("Branch Predictor, Non Prediction Instruction") { //branch_occr = 0 or 1
     test(0);
 }
 
-TEST_CASE("Prediction Instruction") { //branch_occr = 2 or 3
+TEST_CASE("Branch Predictor, Prediction Instruction") { //branch_occr = 2 or 3
     test(1);
 }
diff --git a/dv/con_id.cpp b/dv/con_id.cpp
@@ -41,7 +41,7 @@ std::uint8_t rdn_in, std::uint32_t ins, std::uint32_t pc_in, std::uint32_t rdd)
     INFO("Testing wbe = " << wbe << ", addr_mode = " << addr_mode << ", branch_taken = " << branch_taken << ", immode = " << (int) immode << ", rdn_in = " << (int) rdn_in << ", ins = " << ins << ", pc_in = " << pc_in << ", and rdd = " << rdd);
 
     // Test pc passthrough
-    REQUIRE((uint32_t) con_id.pc == (unit32_t) pc_in);
+    REQUIRE((uint32_t) con_id.pc == (std::uint32_t) pc_in);
 
     switch(immode) {
         /* Note that the exact implementation of >> depends on the compiler. As such, this code is written with that in mind and as such the values 
@@ -50,19 +50,19 @@ std::uint8_t rdn_in, std::uint32_t ins, std::uint32_t pc_in, std::uint32_t rdd)
             REQUIRE((std::uint32_t) con_id.imm == (std::uint32_t) 0);
             break;
         case 1:
-            REQUIRE((std::uint32_t) con_id.imm == (std::uint32_t) (0xFFFFF000 * (bool) (ins_in & (1 << 31)) + ((ins_in & ((std::uint32_t)  (pow(2, 12) - 1) << 20)) >> 20)));
+            REQUIRE((std::uint32_t) con_id.imm == (std::uint32_t) (0xFFFFF000 * (bool) (ins & (1 << 31)) + ((ins & ((std::uint32_t)  (pow(2, 12) - 1) << 20)) >> 20)));
             break;
         case 2:
-            REQUIRE((std::uint32_t) con_id.imm == (std::uint32_t) (0xFFFFF000 * (bool) (ins_in & (1 << 31)) + (((ins_in & ((std::uint32_t) (pow(2, 7) - 1) << 25)) >> 25 ) << 5 )+ ((ins_in & ((std::uint32_t) (pow(2, 5) - 1) << 7)) >> 7)));
+            REQUIRE((std::uint32_t) con_id.imm == (std::uint32_t) (0xFFFFF000 * (bool) (ins & (1 << 31)) + (((ins & ((std::uint32_t) (pow(2, 7) - 1) << 25)) >> 25 ) << 5 )+ ((ins & ((std::uint32_t) (pow(2, 5) - 1) << 7)) >> 7)));
             break;
         case 3:
-            REQUIRE((std::uint32_t) con_id.imm == (std::uint32_t) (0xFFFFF000 * (bool) (ins_in & (1 << 31)) + (((ins_in & (1  << 7)) >> 7) << 11) + (((ins_in & ((std::uint32_t) (pow(2, 6) - 1) << 25)) >> 25) << 5) + (((ins_in & ((std::uint32_t) (pow(2, 4) - 1) << 8)) >> 8) << 1)));
+            REQUIRE((std::uint32_t) con_id.imm == (std::uint32_t) (0xFFFFF000 * (bool) (ins & (1 << 31)) + (((ins & (1  << 7)) >> 7) << 11) + (((ins & ((std::uint32_t) (pow(2, 6) - 1) << 25)) >> 25) << 5) + (((ins & ((std::uint32_t) (pow(2, 4) - 1) << 8)) >> 8) << 1)));
             break;
         case 4:
-            REQUIRE((std::uint32_t) con_id.imm == (std::uint32_t) (ins_in & 0xFFFFF000));
+            REQUIRE((std::uint32_t) con_id.imm == (std::uint32_t) (ins & 0xFFFFF000));
             break;
         case 5:
-            REQUIRE((std::uint32_t) con_id.imm == (std::uint32_t) ((((ins_in & (1 << 31)) >> 11) + ((ins_in & ((std::uint32_t)  (pow(2, 8) - 1) << 12)))  +  ((ins_in & (1 << 20)) >> 9) + (((ins_in >> 20) & 0x7FE)) & 0x1FFFFF)));
+            REQUIRE((std::uint32_t) con_id.imm == (std::uint32_t) ((((ins & (1 << 31)) >> 11) + ((ins & ((std::uint32_t)  (pow(2, 8) - 1) << 12)))  +  ((ins & (1 << 20)) >> 9) + (((ins >> 20) & 0x7FE)) & 0x1FFFFF)));
             break;
         default:
             break;
@@ -81,7 +81,7 @@ std::uint8_t rdn_in, std::uint32_t ins, std::uint32_t pc_in, std::uint32_t rdd)
 
     else {
         if (branch_taken) {
-            REQUIRE((std::uint32_t) con_id.branch_addr == (std::uint32_t) (pc_in + model.imm));
+            REQUIRE((std::uint32_t) con_id.branch_addr == (std::uint32_t) (pc_in + con_id.imm));
             REQUIRE((std::uint32_t) con_id.npc == (std::uint32_t) con_id.branch_addr);
         }
         else {
@@ -92,14 +92,14 @@ std::uint8_t rdn_in, std::uint32_t ins, std::uint32_t pc_in, std::uint32_t rdd)
 }
 
 static void eval_regs(auto& con_id, bool wbe, bool addr_mode, bool branch_taken, std::uint8_t immode, 
-std::uint8_t rdn_in, std::uint32_t ins, std::uint32_t pc_in, std::uint32_t rdd, uint32_t &regvals[32]) {
+std::uint8_t rdn_in, std::uint32_t ins, std::uint32_t pc_in, std::uint32_t rdd, uint32_t regvals[32]) {
 
     //Calculate RS1N and RS2N
     std::uint8_t rs1n = (std::uint8_t) ((ins & (31 << 15)) >> 15);
     std::uint8_t rs2n = (std::uint8_t) ((ins & (31 << 20)) >> 20);
 
     //Simulate register behavior
-    if (wbe && rdn_in) regvals[rdn_in] = (uint32_t) rdd;
+    if (wbe && rdn_in) regvals[rdn_in] = (std::uint32_t) rdd;
 
     con_id.clk = 0;
     con_id.rstn = 1;
@@ -134,7 +134,7 @@ std::uint8_t rdn_in, std::uint32_t ins, std::uint32_t pc_in, std::uint32_t rdd,
     INFO("Testing rs1n = " << (int) rs1n << ", rs2n = " << (int) rs2n << ", wbe = " << wbe << ", addr_mode = " << addr_mode << ", branch_taken = " << branch_taken << ", immode = " << (int) immode << ", rdn_in = " << (int) rdn_in << ", ins = " << ins << ", pc_in = " << pc_in << ", and rdd = " << rdd);
 
     // Test pc passthrough
-    REQUIRE((uint32_t) con_id.pc == (unit32_t) pc_in);
+    REQUIRE((std::uint32_t) con_id.pc == (std::uint32_t) pc_in);
 
     //Test register data output
     REQUIRE((std::uint32_t) con_id.rs1d == (std::uint32_t) regvals[rs1n]);
@@ -154,17 +154,17 @@ static void init(auto& con_id) {
 }
 
 static void test_imm(std::uint8_t immode) {
-    auto& con_id {nyu::getDUT<VCON_ID>()};
+    auto& con_id {nyu::getDUT<VCon_ID>()};
 
     init(con_id);
 
     for (int wbe {0}; wbe < 2; ++wbe)
         for (int addr_mode {0}; addr_mode < 2; ++addr_mode) 
             for (int branch_taken {0}; branch_taken < 2; ++branch_taken) 
-                for (std::uint8_t rdn_in {0}; rdn_in < 32; ++rdn_in) 
-                    for (std::uint32_t ins {0}; ins < 32; ++ins)
-                        for (std::uint32_t pc_in {0}; pc_in < 32; ++pc_in) 
-                            for(std::uint32_t rdd {0}; rdd < 32; ++rdd)
+                for (std::uint8_t rdn_in {0}; rdn_in < 16; ++rdn_in) 
+                    for (std::uint32_t ins {0}; ins < 16; ++ins)
+                        for (std::uint32_t pc_in {0}; pc_in < 16; ++pc_in) 
+                            for(std::uint32_t rdd {0}; rdd < 16; ++rdd)
                                 eval(con_id, wbe, addr_mode, branch_taken, immode, rdn_in, ins, pc_in, rdd);
 
     for (int wbe {0}; wbe < 2; ++wbe)
@@ -181,17 +181,17 @@ static void test_imm(std::uint8_t immode) {
 
 
 static void test_branch(bool addr_mode, bool branch_taken) {
-    auto& con_id {nyu::getDUT<VCON_ID>()};
+    auto& con_id {nyu::getDUT<VCon_ID>()};
 
     init(con_id);
 
 
     for (int wbe {0}; wbe < 2; ++wbe)
        for (std::uint8_t immode {0}; immode < 6; ++immode) 
-            for (std::uint8_t rdn_in {0}; rdn_in < 32; ++rdn_in) 
-                for (std::uint32_t ins {0}; ins < 32; ++ins)
-                    for (std::uint32_t pc_in {0}; pc_in < 32; ++pc_in) 
-                        for(std::uint32_t rdd {0}; rdd < 32; ++rdd)
+            for (std::uint8_t rdn_in {0}; rdn_in < 16; ++rdn_in) 
+                for (std::uint32_t ins {0}; ins < 16; ++ins)
+                    for (std::uint32_t pc_in {0}; pc_in < 16; ++pc_in) 
+                        for(std::uint32_t rdd {0}; rdd < 16; ++rdd)
                             eval(con_id, wbe, addr_mode, branch_taken, immode, rdn_in, ins, pc_in, rdd);
 
 
@@ -206,7 +206,7 @@ static void test_branch(bool addr_mode, bool branch_taken) {
 
 static void test_regs() {
 
-    auto& con_id {nyu::getDUT<VCON_ID>()};
+    auto& con_id {nyu::getDUT<VCon_ID>()};
 
     init(con_id);
 

diff --git a/dv/exmem.cpp b/dv/exmem.cpp
@@ -50,7 +50,7 @@ std::uint32_t rs2d, bool reset) {
 
 static void test(bool reset) {
   for(std::uint8_t rdn_in {0}; rdn_in < 32; ++rdn_in)
-    for(std::uint32_t alu_out_in {0}; alu_out_in < 128; ++alu_out_in)
+    for(std::uint32_t alu_out_in {0}; alu_out_in < 32; ++alu_out_in)
       for(std::uint32_t rs2d {0}; rs2d < 32; ++rs2d)
         eval(rdn_in, alu_out_in, rs2d, reset);