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add(Pipeline_Reset.sv, pipeline_reset.cpp): Added Pipeline Reset Modu…
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…le and Tests (#117)

* add(Pipeline_Reset.sv): Pipeline Reset Implement

* fix(branch_manager.cpp): FIxed random number gen

* add(pipeline_reset.cpp): Added Pipeline Reset Test
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ShinyMiraidon authored Nov 14, 2023
1 parent ed4b392 commit d3962ff
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Showing 5 changed files with 86 additions and 9 deletions.
4 changes: 2 additions & 2 deletions dv/CMakeLists.txt
Original file line number Diff line number Diff line change
Expand Up @@ -3,11 +3,11 @@ find_package(nyu-util REQUIRED CONFIG)

add_executable(tests)
target_sources(tests PRIVATE
alu.cpp branch_eval.cpp pc.cpp ifid.cpp memwb.cpp gpr.cpp exmem.cpp branch_addr_calc.cpp idex.cpp branch_predictor.cpp
alu.cpp branch_eval.cpp pc.cpp ifid.cpp memwb.cpp gpr.cpp exmem.cpp branch_addr_calc.cpp idex.cpp branch_predictor.cpp pipeline_reset.cpp
)
nyu_link_sv(tests PRIVATE core)
nyu_target_verilate(tests
TOP_MODULES Alu Branch_Eval PC IFID MEMWB GPR EXMEM Branch_Addr_Calc IDEX Branch_Predictor
TOP_MODULES Alu Branch_Eval PC IFID MEMWB GPR EXMEM Branch_Addr_Calc IDEX Branch_Predictor Pipeline_Reset
ARGS COVERAGE
)
target_link_libraries(tests PRIVATE Catch2::Catch2WithMain nyu::covrecorder)
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12 changes: 6 additions & 6 deletions dv/branch_manager.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -31,8 +31,8 @@ TEST_CASE("Flush") {
for (int i = 0; i < 1000; i++) {
pred_taken = rand() % (int) (pow(2, 1) - 1);
act_taken = rand() % (int) (pow(2, 1) - 1);
pred_pc = rand() % (int) (pow(32, 1) - 1);
pred_addr = rand() % (int) (pow(32, 1) - 1);
pred_pc = rand() % (int) (pow(2, 32) - 1);
pred_addr = rand() % (int) (pow(2, 32) - 1);

model.clk = 0;
model.eval();
Expand Down Expand Up @@ -78,8 +78,8 @@ TEST_CASE("Incorrect Prediction") {
for (int i = 0; i < 1000; i++) {
pred_taken = rand() % (int) (pow(2, 1) - 1);
act_taken = ~pred_taken;
pred_pc = rand() % (int) (pow(32, 1) - 1);
pred_addr = rand() % (int) (pow(32, 1) - 1);
pred_pc = rand() % (int) (pow(2, 32) - 1);
pred_addr = rand() % (int) (pow(2, 32) - 1);

model.clk = 0;
model.eval();
Expand Down Expand Up @@ -128,8 +128,8 @@ TEST_CASE("Correct Prediction") {
for (int i = 0; i < 1000; i++) {
pred_taken = rand() % (int) (pow(2, 1) - 1);
act_taken = pred_taken;
pred_pc = rand() % (int) (pow(32, 1) - 1);
pred_addr = rand() % (int) (pow(32, 1) - 1);
pred_pc = rand() % (int) (pow(2, 32) - 1);
pred_addr = rand() % (int) (pow(2, 32) - 1);

model.clk = 0;
model.eval();
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55 changes: 55 additions & 0 deletions dv/pipeline_reset.cpp
Original file line number Diff line number Diff line change
@@ -0,0 +1,55 @@
#include <catch2/catch_test_macros.hpp>
#include <VPipeline_Reset.h>
#include <cstdint>
#include <stdlib.h>
#include <math.h>

/*
Note:
The tests do not currently distinguish between High Z and 0 due to limitations of Verilator.
The module could be modified to provide a test output that is 0 when rstn is 0 and 1 when rstn is High Z,
but given the simplicity of this module that doesn't seem warrented at this point.
*/


TEST_CASE("flush == 0") {
VPipeline_Reset model;

uint32_t npc_in;
uint32_t npc_corr;

for (int i = 0; i < 1000; i++) {
npc_in = rand() % (int) (pow(2, 32) - 1);
npc_corr = rand() % (int) (pow(2, 32) - 1);

model.flush = 0;
model.npc_in = npc_in;
model.npc_corr = npc_corr;
model.eval();

REQUIRE((uint32_t) model.npc == (uint32_t) npc_in);
REQUIRE(model.rstn == 0); //Verilator translates High Z outputs to 0

}
}

TEST_CASE("flush == 1") {
VPipeline_Reset model;

uint32_t npc_in;
uint32_t npc_corr;

for (int i = 0; i < 1000; i++) {
npc_in = rand() % (int) (pow(2, 32) - 1);
npc_corr = rand() % (int) (pow(2, 32) - 1);

model.flush = 1;
model.npc_in = npc_in;
model.npc_corr = npc_corr;
model.eval();

REQUIRE((uint32_t) model.npc == (uint32_t) npc_corr);
REQUIRE(model.rstn == 0); //Expect actual 0 output here, not High Z

}
}
2 changes: 1 addition & 1 deletion rtl/CMakeLists.txt
Original file line number Diff line number Diff line change
@@ -1,3 +1,3 @@
nyu_add_sv(core
Alu.sv Branch_Eval.sv PC.sv IFID.sv MEMWB.sv GPR.sv EXMEM.sv Branch_Addr_Calc.sv IDEX.sv Branch_Predictor.sv
Alu.sv Branch_Eval.sv PC.sv IFID.sv MEMWB.sv GPR.sv EXMEM.sv Branch_Addr_Calc.sv IDEX.sv Branch_Predictor.sv Pipeline_Reset.sv
)
22 changes: 22 additions & 0 deletions rtl/Pipeline_Reset.sv
Original file line number Diff line number Diff line change
@@ -0,0 +1,22 @@
module Pipeline_Reset #(
WordSize = 32
)(
input [WordSize - 1:0] npc_in, npc_corr,
input flush,
output logic [WordSize - 1:0] npc,
output logic rstn
);

always_comb begin
case(flush)
0: begin
npc = npc_in;
rstn = 1'bZ;
end
1: begin
npc = npc_corr;
rstn = 0;
end
endcase
end
endmodule

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