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change condition value to svfvar in intracfgedge #1572

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merged 1 commit into from
Oct 15, 2024
Merged

change condition value to svfvar in intracfgedge #1572

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6 changes: 3 additions & 3 deletions svf-llvm/lib/ICFGBuilder.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -157,7 +157,7 @@ void ICFGBuilder::processFunBody(WorkList& worklist)
}
InstVec nextInsts;
LLVMUtil::getNextInsts(inst, nextInsts);
u32_t branchID = 0;
s64_t branchID = 0;
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Why s64_t here?

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I thought this would be more consistent with the field branchCond being of type s64_t.

for (InstVec::const_iterator nit = nextInsts.begin(), enit =
nextInsts.end(); nit != enit; ++nit)
{
Expand Down Expand Up @@ -185,7 +185,7 @@ void ICFGBuilder::processFunBody(WorkList& worklist)
{
assert(branchID <= 1 && "if/else has more than two branches?");
if(br->isConditional())
icfg->addConditionalIntraEdge(srcNode, dstNode, llvmModuleSet()->getSVFValue(br->getCondition()), 1 - branchID);
icfg->addConditionalIntraEdge(srcNode, dstNode, 1 - branchID);
else
icfg->addIntraEdge(srcNode, dstNode);
}
Expand All @@ -197,7 +197,7 @@ void ICFGBuilder::processFunBody(WorkList& worklist)
s64_t val = -1;
if (condVal && condVal->getBitWidth() <= 64)
val = condVal->getSExtValue();
icfg->addConditionalIntraEdge(srcNode, dstNode, llvmModuleSet()->getSVFValue(si->getCondition()),val);
icfg->addConditionalIntraEdge(srcNode, dstNode,val);
}
else
icfg->addIntraEdge(srcNode, dstNode);
Expand Down
19 changes: 19 additions & 0 deletions svf-llvm/lib/SVFIRBuilder.cpp
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Expand Up @@ -975,6 +975,17 @@ void SVFIRBuilder::visitBranchInst(BranchInst &inst)
branchID++;
}
addBranchStmt(brinst, cond, successors);
/// set conditional svf var
if (inst.isConditional())
{
for (auto& edge : llvmModuleSet()->getICFGNode(&inst)->getOutEdges())
{
if (IntraCFGEdge* intraEdge = SVFUtil::dyn_cast<IntraCFGEdge>(edge))
{
intraEdge->setConditionVar(pag->getGNode(cond));
}
}
}
}


Expand Down Expand Up @@ -1043,6 +1054,14 @@ void SVFIRBuilder::visitSwitchInst(SwitchInst &inst)
successors.push_back(std::make_pair(icfgNode, val));
}
addBranchStmt(brinst, cond, successors);
/// set conditional svf var
for (auto& edge : llvmModuleSet()->getICFGNode(&inst)->getOutEdges())
{
if (IntraCFGEdge* intraEdge = SVFUtil::dyn_cast<IntraCFGEdge>(edge))
{
intraEdge->setConditionVar(pag->getGNode(cond));
}
}
}


Expand Down
2 changes: 1 addition & 1 deletion svf/include/Graphs/ICFG.h
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Expand Up @@ -143,7 +143,7 @@ class ICFG : public GenericICFGTy
/// Add intraprocedural and interprocedural control-flow edges.
//@{
ICFGEdge* addIntraEdge(ICFGNode* srcNode, ICFGNode* dstNode);
ICFGEdge* addConditionalIntraEdge(ICFGNode* srcNode, ICFGNode* dstNode, const SVFValue* condition, s32_t branchCondVal);
ICFGEdge* addConditionalIntraEdge(ICFGNode* srcNode, ICFGNode* dstNode, s64_t branchCondVal);
ICFGEdge* addCallEdge(ICFGNode* srcNode, ICFGNode* dstNode);
ICFGEdge* addRetEdge(ICFGNode* srcNode, ICFGNode* dstNode);
//@}
Expand Down
22 changes: 14 additions & 8 deletions svf/include/Graphs/ICFGEdge.h
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Expand Up @@ -114,6 +114,8 @@ class IntraCFGEdge : public ICFGEdge
{
friend class SVFIRWriter;
friend class SVFIRReader;
friend class ICFG;
friend class SVFIRBuilder;

public:
/// Constructor
Expand All @@ -137,7 +139,7 @@ class IntraCFGEdge : public ICFGEdge
}
//@}

const SVFValue* getCondition() const
const SVFVar* getCondition() const
{
return conditionVar;
}
Expand All @@ -148,12 +150,6 @@ class IntraCFGEdge : public ICFGEdge
return branchCondVal;
}

void setBranchCondition(const SVFValue* c, s64_t bVal)
{
conditionVar = c;
branchCondVal = bVal;
}

virtual const std::string toString() const;

private:
Expand All @@ -166,8 +162,18 @@ class IntraCFGEdge : public ICFGEdge
/// Inst3: label 1;
/// for edge between Inst1 and Inst 2, the first element is %cmp and
/// the second element is 0
const SVFValue* conditionVar;
const SVFVar* conditionVar;
s64_t branchCondVal;

inline void setConditionVar(const SVFVar* c)
{
conditionVar = c;
}

inline void setBranchCondVal(s64_t bVal)
{
branchCondVal = bVal;
}
};

/*!
Expand Down
4 changes: 1 addition & 3 deletions svf/lib/AE/Svfexe/AbstractInterpretation.cpp
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Expand Up @@ -452,9 +452,7 @@ bool AbstractInterpretation::isSwitchBranchFeasible(const SVFVar* var, s64_t suc
bool AbstractInterpretation::isBranchFeasible(const IntraCFGEdge* intraEdge,
AbstractState& as)
{
const SVFValue *cond = intraEdge->getCondition();
NodeID cmpID = svfir->getValueNode(cond);
SVFVar *cmpVar = svfir->getGNode(cmpID);
const SVFVar *cmpVar = intraEdge->getCondition();
if (cmpVar->getInEdges().empty())
{
return isSwitchBranchFeasible(cmpVar,
Expand Down
4 changes: 2 additions & 2 deletions svf/lib/Graphs/ICFG.cpp
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Expand Up @@ -341,7 +341,7 @@ ICFGEdge* ICFG::addIntraEdge(ICFGNode* srcNode, ICFGNode* dstNode)
/*!
* Add conditional intraprocedural edges between two nodes
*/
ICFGEdge* ICFG::addConditionalIntraEdge(ICFGNode* srcNode, ICFGNode* dstNode, const SVFValue* condition, s32_t branchCondVal)
ICFGEdge* ICFG::addConditionalIntraEdge(ICFGNode* srcNode, ICFGNode* dstNode, s64_t branchCondVal)
{

checkIntraEdgeParents(srcNode, dstNode);
Expand All @@ -354,7 +354,7 @@ ICFGEdge* ICFG::addConditionalIntraEdge(ICFGNode* srcNode, ICFGNode* dstNode, co
else
{
IntraCFGEdge* intraEdge = new IntraCFGEdge(srcNode,dstNode);
intraEdge->setBranchCondition(condition,branchCondVal);
intraEdge->setBranchCondVal(branchCondVal);
return (addICFGEdge(intraEdge) ? intraEdge : nullptr);
}
}
Expand Down
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