Skip to content

Pipelined a real-time edge detection system with a OV7670 camera and Nexys A7 100T FPGA Trainer Board

Notifications You must be signed in to change notification settings

amsacks/OV7670-Video-Processing

Folders and files

NameName
Last commit message
Last commit date

Latest commit

 

History

10 Commits
 
 
 
 
 
 
 
 
 
 
 
 
 
 

Repository files navigation

Project Outline

Description: Implement in Verilog add-ons such as grayscaling, sharpening and edge detection to the OV7670 project. Functionality will be verified through self-check testbenches written in SystemVerilog

Updates

(03/17/23): Given RTL works on hardware for procuding only real-time edge detection (sobel filter) with a fixed threshold.

About

Pipelined a real-time edge detection system with a OV7670 camera and Nexys A7 100T FPGA Trainer Board

Topics

Resources

Stars

Watchers

Forks

Releases

No releases published

Packages

No packages published