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doc: Fixed SPI documentation consistency #1239

Merged
merged 1 commit into from
Dec 18, 2023
Merged

doc: Fixed SPI documentation consistency #1239

merged 1 commit into from
Dec 18, 2023

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caosjr
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@caosjr caosjr commented Dec 14, 2023

PR Description

I have updated the documentation for the SPI. I had to modify spi_engine_execution_ip.tcl because the scripts are using it for some strings.

PR Type

  • Bug fix (change that fixes an issue)
  • New feature (change that adds new functionality)
  • Breaking change (has dependencies in other repos or will cause CI to fail)

PR Checklist

  • I have followed the code style guidelines
  • I have performed a self-review of changes
  • I have compiled all hdl projects and libraries affected by this PR
  • I have tested in hardware affected projects, at least on relevant boards
  • I have commented my code, at least hard-to-understand parts
  • I have signed off all commits from this PR
  • I have updated the documentation (wiki pages, ReadMe files, Copyright etc)
  • I have not introduced new Warnings/Critical Warnings on compilation
  • I have added new hdl testbenches or updated existing ones

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CLAassistant commented Dec 14, 2023 •
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LBFFilho
LBFFilho previously approved these changes Dec 14, 2023
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Looks good to me. Thank you for fixing the CPHA documentation.

@gastmaier
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gastmaier commented Dec 14, 2023 •
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Need to sign-off the commit, you can use an alternative e-mail for now (gmail, etc)

@caosjr caosjr force-pushed the main branch 3 times, most recently from 64fd892 to 92e86fa Compare December 14, 2023 17:08
gastmaier
gastmaier previously approved these changes Dec 14, 2023
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acostina
acostina previously approved these changes Dec 18, 2023
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@caosjr
spi_engine: Fixup param ranges and CPHA info
34fab90 
Set validation ranges for DATA_WIDTH and NUM_OF_CS for the expected
min/max values in the verilog source code.
Also, fix swapped description for CPHA in the documentation.

Signed-off-by: Carlos Oliveira <caosjr8@gmail.com>
@caosjr caosjr dismissed stale reviews from acostina, gastmaier, and LBFFilho via 34fab90 December 18, 2023 13:23
@LBFFilho LBFFilho merged commit bad1d03 into analogdevicesinc:main Dec 18, 2023
1 of 2 checks passed
IuliaCMoldovan pushed a commit that referenced this pull request Jan 12, 2024
@caosjr @IuliaCMoldovan
spi_engine: Fixup param ranges and CPHA info (#1239)
60f5f4f 
Set validation ranges for DATA_WIDTH and NUM_OF_CS for the expected
min/max values in the verilog source code.
Also, fix swapped description for CPHA in the documentation.

Signed-off-by: Carlos Oliveira <caosjr8@gmail.com>
bia1708 pushed a commit to bia1708/hdl that referenced this pull request Apr 5, 2024
@caosjr @bia1708
spi_engine: Fixup param ranges and CPHA info (analogdevicesinc#1239)
1231903 
Set validation ranges for DATA_WIDTH and NUM_OF_CS for the expected
min/max values in the verilog source code.
Also, fix swapped description for CPHA in the documentation.

Signed-off-by: Carlos Oliveira <caosjr8@gmail.com>
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@IuliaCMoldovan IuliaCMoldovan IuliaCMoldovan approved these changes

@LBFFilho LBFFilho LBFFilho approved these changes

@acostina acostina acostina approved these changes

@gastmaier gastmaier gastmaier approved these changes

@StancaPop StancaPop Awaiting requested review from StancaPop StancaPop is a code owner

@AndreiGrozav AndreiGrozav Awaiting requested review from AndreiGrozav

@PopPaul2021 PopPaul2021 Awaiting requested review from PopPaul2021

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@caosjr @CLAassistant @gastmaier @acostina @LBFFilho @IuliaCMoldovan