Add Dwmac 5.10a Ethernet Driver #188
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Kswin01
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| @@ -16,6 +16,7 @@ | |||
| #include <serial_config.h> | |||
| #include <ethernet_config.h> | |||
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| #ifdef CONFIG_ARCH_ARM | |||
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#ifdefs in code files need to be factored out. In this case, make separate benchmark-arm.c and benchmark-risc-V.c and either build just one of them in the Makefile, or include just one with
#include "benchmark-" #ARCH ".c"
or similar.
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The problem is that because there's no seL4 support for benchmarking functionality on RISC-V, we can't really do anything on RISC-V.
drivers/network/starfive/ethernet.c
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| // For normal transmit descriptors, tdes2 needs to be set to generate an IRQ on transmit | ||
| // completion. We also need to provide the length of the buffer data in bits 13:0. | ||
| uint32_t tdes2 = DESC_TXCTRL_TXINT | buffer.len; |
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You probably only want to interrupt when the next-to last queued Tx buf is processed. There's no point in interrupting for every frame.
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I agree, I'll try this change out. However this is the same method that is used in the meson driver, where we are setting the interrupt completion bit on every tx packet.
drivers/network/starfive/ethernet.c
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| Star64 in the TS machine queue. This address is resident the boards EEPROM, however, | ||
| we need I2C to read from this ROM. */ | ||
| *MAC_REG(GMAC_ADDR_HIGH(0)) = 0x00005b75; | ||
| *MAC_REG(GMAC_ADDR_LOW(0)) = 0x0039cf6c; |
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Should make this a #define, as we're using the driver for the IMX8MP as well.
| @@ -10,6 +10,7 @@ | |||
| #include <sddf/util/util.h> | |||
| #include <microkit.h> | |||
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| #ifdef CONFIG_ARCH_ARM | |||
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Find a way to do this without #ifdefs
Signed-off-by: Krishnan Winter <krishnanwinter1@gmail.com>
Signed-off-by: Krishnan Winter <krishnanwinter1@gmail.com>
Signed-off-by: Krishnan Winter <krishnanwinter1@gmail.com>
Signed-off-by: Krishnan Winter <krishnanwinter1@gmail.com>
Kswin01
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Signed-off-by: Krishnan Winter <krishnanwinter1@gmail.com>
Signed-off-by: Krishnan Winter <krishnanwinter1@gmail.com>
Signed-off-by: Krishnan Winter <krishnanwinter1@gmail.com>
Signed-off-by: Krishnan Winter <krishnanwinter1@gmail.com>
Signed-off-by: Krishnan Winter <krishnanwinter1@gmail.com>
Signed-off-by: Krishnan Winter <krishnanwinter1@gmail.com>
Signed-off-by: Krishnan Winter <krishnanwinter1@gmail.com>
Rather than having #ifdefs for ARM, we instead have the implementations handle the architecture specific operations. In RISC-V's case, this is just a no-op. I removed `ROUND_UP(buffer.len, 1 << CONFIG_L1_CACHE_LINE_SIZE_BITS)` because we do the rounding up in `cache_clean_and_invalidate` anyways. We can't have this line on RISC-V because `CONFIG_L1_CACHE_LINE_SIZE_BITS` does not exist on non-ARM architectures. Signed-off-by: Ivan Velickovic <i.velickovic@unsw.edu.au>
Signed-off-by: Krishnan Winter <krishnanwinter1@gmail.com>
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Drop these changes.
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Drop this change.
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Drop these changes.
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Okay if you just drop the changes of the files I commented on then we just have so sort out the licensing of the register definitions and then we can merge. |
Signed-off-by: Krishnan Winter <krishnanwinter1@gmail.com>
Signed-off-by: Krishnan Winter <krishnanwinter1@gmail.com>
Signed-off-by: Krishnan Winter <krishnanwinter1@gmail.com>
fix packet length read from descriptor in dwmac
This PR adds support for dwmac 5.10a ethernet driver, primarily tested on the Pine64 Star64.
These are preliminary performance figures when running the echo_server example. There is still considerable performance improvements to be made.