Full RCC support for STM32F107 #3779
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instead of adding a new (We used to have code duplication like this in RCC a while ago and it proved to be an unmaintainable mess. Hard to keep them in sync with fixes and features. the file you've added is already out of sync, for example it does |
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@Dirbaio sure. Is there some thinking of how these are bundled together? Like, why is f107 sorted under f013? Like is there some arch concept that certain groups of STM32 belongs together? |
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Yes, they're grouped by "what STM32 families are more similar". ST did some design for the F1, then F107, F3, F0 are incremental improvements on top of that but the "overall structure" stays very similar. OTOH they designed the PLLs very differently for F2, then F4, F7 are incremental improvements on top of that. Etc etc. ( |
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@Dirbaio thanks for explaining. I have pushed an update where I try to merge the changes into f013.rs. Hopefully it's closer to what you want. |
| PllSource::HSE => (Pllsrc::HSE_DIV_PREDIV, unwrap!(hse)), | ||
| #[cfg(stm32f107)] | ||
| PllSource::HSE => ( |
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this is a bit of a lie, if you set PllSource::HSE the source can end up being either HSE or PLL2. I'd suggest adding a new variant PllSource::PLL2 instead, and removing the prediv1_src field from config.
| let in_freq = src_freq / pll.prediv; | ||
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| #[cfg(stm32f107)] | ||
| let in_freq = src_freq / (pll.prediv.to_bits() + 1); |
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this shouldn't be needed, / pll.prediv does the right thing automatically (it's a Div impl generated in build.rs, it's not dividing by the bit value)
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okay, for this to work add Prediv1, Prediv2 here.
embassy/embassy-stm32/build.rs
Line 1386 in 010d462
.to_bits().
| #[cfg(stm32f107)] | ||
| let pll2freq = config.pll2.map(|pll2| { | ||
| let prediv2 = config.prediv2.unwrap_or(PllPreDiv::DIV1); | ||
| let in_freq = hse.unwrap() / (prediv2.to_bits() + 1); |
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same as prediv1, divide directly instead of doing .to_bits(). (see below)
| #[cfg(stm32f107)] | ||
| pub prediv1_src: Option<PreDiv1Src>, | ||
| #[cfg(stm32f107)] | ||
| pub prediv2: Option<PllPreDiv>, |
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this sholdn't be Option, because you can't "not enable prediv2".
| #[cfg(stm32f107)] | ||
| pub i2s2_src: Option<I2s2src>, | ||
| #[cfg(stm32f107)] | ||
| pub i2s3_src: Option<I2s2src>, |
STM32F107 has a two more PLLs than F013, which means using
f013.rsconfig options doesn't let us configure the entire RCC.My use case is to use STM32F107 for ethernet with an external HSE.
This PR adds a special case for F107 with a fuller RCC config.