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[ESIMD][NFC] Rename L3 cache hint parameters to L2 to avoid confusion #12862

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Feb 29, 2024
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[ESIMD][NFC] Rename L3 cache hint parameters to L2 to avoid confusion #12862

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1c9d479
[ESIMD][NFC] Rename L3 cache hint parameters to L2 to avoid confuses
v-klochkov Feb 29, 2024
0af2a3f
Merge remote-tracking branch 'intel_llvm/sycl' into esimd_L3_to_L2_re…
v-klochkov Feb 29, 2024
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16 changes: 8 additions & 8 deletions sycl/include/sycl/ext/intel/experimental/esimd/detail/memory_intrin.hpp
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Original file line number Diff line number Diff line change
Expand Up @@ -69,7 +69,7 @@ __ESIMD_INTRIN void __esimd_raw_send_nbarrier_signal(
///
/// @tparam Ty is element type.
/// @tparam L1H is L1 cache hint.
/// @tparam L3H is L3 cache hint.
/// @tparam L2H is L2 cache hint.
/// @tparam AddressScale is the address scale.
/// @tparam ImmOffset is the immediate offset added to each address.
/// @tparam DS is the data size.
Expand All @@ -80,7 +80,7 @@ __ESIMD_INTRIN void __esimd_raw_send_nbarrier_signal(
/// @param pred is predicates.
/// @param offsets is the zero-based offsets in bytes.
/// @param surf_ind is the surface index.
template <typename Ty, __ESIMD_ENS::cache_hint L1H, __ESIMD_ENS::cache_hint L3H,
template <typename Ty, __ESIMD_ENS::cache_hint L1H, __ESIMD_ENS::cache_hint L2H,
uint16_t AddressScale, int ImmOffset, __ESIMD_ENS::lsc_data_size DS,
__ESIMD_EDNS::lsc_vector_size VS,
__ESIMD_EDNS::lsc_data_order _Transposed, int N,
Expand All @@ -98,7 +98,7 @@ __esimd_lsc_prefetch_bti(__ESIMD_DNS::simd_mask_storage_t<N> pred,
///
/// @tparam Ty is element type.
/// @tparam L1H is L1 cache hint.
/// @tparam L3H is L3 cache hint.
/// @tparam L2H is L2 cache hint.
/// @tparam DS is the data size.
/// @tparam Transposed is the transposed version or not.
/// @tparam NBlocks is the number of blocks.
Expand All @@ -120,7 +120,7 @@ __esimd_lsc_prefetch_bti(__ESIMD_DNS::simd_mask_storage_t<N> pred,
/// otherwise,
/// N = roundUpNextMultiple(BlockHeight, 4 / sizeof(T)) *
/// getNextPowerOf2(BlockWidth) * NBlocks
template <typename Ty, __ESIMD_ENS::cache_hint L1H, __ESIMD_ENS::cache_hint L3H,
template <typename Ty, __ESIMD_ENS::cache_hint L1H, __ESIMD_ENS::cache_hint L2H,
__ESIMD_ENS::lsc_data_size DS,
__ESIMD_EDNS::lsc_data_order _Transposed, uint8_t NBlocks,
int BlockWidth, int BlockHeight, bool Transformed, int N>
Expand All @@ -136,7 +136,7 @@ __esimd_lsc_load2d_stateless(__ESIMD_DNS::simd_mask_storage_t<N> Pred,
///
/// @tparam Ty is element type.
/// @tparam L1H is L1 cache hint.
/// @tparam L3H is L3 cache hint.
/// @tparam L2H is L2 cache hint.
/// @tparam DS is the data size.
/// @tparam NBlocks is the number of blocks.
/// @tparam Transposed is the transposed version or not.
Expand All @@ -153,7 +153,7 @@ __esimd_lsc_load2d_stateless(__ESIMD_DNS::simd_mask_storage_t<N> Pred,
/// number of elements.
/// @param Y is zero based Y-coordinate of the left upper rectangle corner in
/// rows.
template <typename Ty, __ESIMD_ENS::cache_hint L1H, __ESIMD_ENS::cache_hint L3H,
template <typename Ty, __ESIMD_ENS::cache_hint L1H, __ESIMD_ENS::cache_hint L2H,
__ESIMD_ENS::lsc_data_size DS,
__ESIMD_EDNS::lsc_data_order _Transposed, uint8_t NBlocks,
int BlockWidth, int BlockHeight, bool Transformed, int N>
Expand All @@ -168,7 +168,7 @@ __ESIMD_INTRIN void __esimd_lsc_prefetch2d_stateless(
///
/// @tparam Ty is element type.
/// @tparam L1H is L1 cache hint.
/// @tparam L3H is L3 cache hint.
/// @tparam L2H is L2 cache hint.
/// @tparam DS is the data size.
/// @tparam Transposed is the transposed version or not.
/// @tparam NBlocks is the number of blocks.
Expand All @@ -190,7 +190,7 @@ __ESIMD_INTRIN void __esimd_lsc_prefetch2d_stateless(
/// otherwise,
/// N = roundUpNextMultiple(BlockHeight, 4 / sizeof(T)) *
/// getNextPowerOf2(BlockWidth) * NBlocks
template <typename Ty, __ESIMD_ENS::cache_hint L1H, __ESIMD_ENS::cache_hint L3H,
template <typename Ty, __ESIMD_ENS::cache_hint L1H, __ESIMD_ENS::cache_hint L2H,
__ESIMD_ENS::lsc_data_size DS,
__ESIMD_EDNS::lsc_data_order _Transposed, uint8_t NBlocks,
int BlockWidth, int BlockHeight, bool Transformed, int N>
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