[LLHD] Add DesequentializationPass (#7616)

include/circt/Dialect/LLHD/Transforms/Passes.h

@@ -14,6 +14,7 @@
 #define CIRCT_DIALECT_LLHD_TRANSFORMS_PASSES_H
 
 #include "circt/Support/LLVM.h"
+#include "mlir/Pass/Pass.h"
 #include <memory>
 
 namespace circt {
@@ -35,8 +36,9 @@ std::unique_ptr<OperationPass<hw::HWModuleOp>> createEarlyCodeMotionPass();
 
 std::unique_ptr<OperationPass<hw::HWModuleOp>> createTemporalCodeMotionPass();
 
-/// Register the LLHD Transformation passes.
-void initLLHDTransformationPasses();
+#define GEN_PASS_DECL_DESEQUENTIALIZATION
+#define GEN_PASS_REGISTRATION
+#include "circt/Dialect/LLHD/Transforms/Passes.h.inc"
 
 } // namespace llhd
 } // namespace circt

include/circt/Dialect/LLHD/Transforms/Passes.td

@@ -128,4 +128,27 @@ def TemporalCodeMotion : Pass<"llhd-temporal-code-motion", "hw::HWModuleOp"> {
   let constructor = "circt::llhd::createTemporalCodeMotionPass()";
 }
 
+def Desequentialization : Pass<"llhd-desequentialize", "hw::HWModuleOp"> {
+  let summary = "convert sequential processes to registers";
+  let description = [{
+    Analyzes the drive conditions of all drives in sequential processes and
+    tries to convert them to registers.
+    This is not always possible because a process might consist of more than two
+    temporal regions, or the drive condition might depend on values sampled in the
+    past that are not a clock, or the condition depends on the conjunction of two
+    clocks which is not supported by regular registers, etc.
+    If all drives in a process were successfully lowered to registers, the process
+    is inlined into the surrounding module.
+  }];
+
+  let options = [
+    Option<"maxPrimitives", "max-primitives", "unsigned", "8",
+           "The maximum number of primitives to analyze.">,
+  ];
+
+  let dependentDialects = [
+    "comb::CombDialect", "hw::HWDialect", "seq::SeqDialect"
+  ];
+}
+
 #endif // CIRCT_DIALECT_LLHD_TRANSFORMS_PASSES

include/circt/Dialect/Seq/SeqOps.td

@@ -70,14 +70,20 @@ def CompRegOp : SeqOp<"compreg",
                    /*initialValue*/ Value(),
                    hw::InnerSymAttr::get(nameAttr));
     }]>,
+    /// Create a register with a reset and optional power-on value.
+    OpBuilder<(ins "Value":$input, "Value":$clk, "Value":$reset, "Value":$rstValue,
+                   CArg<"Value", "{}">:$initialValue), [{
+      return build($_builder, $_state, input.getType(), input, clk, StringAttr(),
+                   reset, rstValue, initialValue, hw::InnerSymAttr());
+    }]>,
     /// Create a register with a reset, with an inner_sym matching the
-   /// register's name, and optional power-on value.
+    /// register's name, and optional power-on value.
     OpBuilder<(ins "Value":$input, "Value":$clk, "Value":$reset, "Value":$rstValue,
                    "StringAttrOrRef":$name, CArg<"Value", "{}">:$initialValue), [{
       auto nameAttr = name.get($_builder.getContext());
       return build($_builder, $_state, input.getType(), input, clk, nameAttr,
                    reset, rstValue, initialValue, hw::InnerSymAttr::get(nameAttr));
-    }]>
+    }]>,
   ];
 }
 
@@ -407,6 +413,13 @@ def ClockGateOp : SeqOp<"clock_gate", [
   );
 
   let results = (outs ClockType:$output);
+
+  let builders = [
+    OpBuilder<(ins "Value":$clock, "Value":$enable), [{
+      build($_builder, $_state, clock, enable, Value(), hw::InnerSymAttr());
+    }]>,
+  ];
+
   let hasFolder = 1;
   let hasCanonicalizeMethod = 1;
   let assemblyFormat = [{

include/circt/InitAllPasses.h

@@ -64,7 +64,7 @@ inline void registerAllPasses() {
   esi::registerESIPasses();
   firrtl::registerPasses();
   fsm::registerPasses();
-  llhd::initLLHDTransformationPasses();
+  llhd::registerPasses();
   msft::registerPasses();
   om::registerPasses();
   seq::registerPasses();

include/circt/Support/FVInt.h

@@ -22,6 +22,11 @@
 #include "llvm/ADT/StringRef.h"
 #include "llvm/Support/raw_ostream.h"
 
+namespace llvm {
+template <typename T, typename Enable>
+struct DenseMapInfo;
+} // namespace llvm
+
 namespace circt {
 
 /// Four-valued arbitrary precision integers.
@@ -196,6 +201,10 @@ class FVInt {
     unknown.setBitVal(index, (bit >> 1) & 1);
   }
 
+  void setBit(unsigned index, bool val) {
+    setBit(index, static_cast<Bit>(val));
+  }
+
   /// Compute a mask of all the 0 bits in this integer.
   APInt getZeroBits() const { return ~value & ~unknown; }
 
@@ -676,4 +685,24 @@ ParseResult parseFVInt(AsmParser &p, FVInt &result);
 
 } // namespace circt
 
+namespace llvm {
+/// Provide DenseMapInfo for FVInt.
+template <>
+struct DenseMapInfo<circt::FVInt, void> {
+  static inline circt::FVInt getEmptyKey() {
+    return circt::FVInt(DenseMapInfo<APInt>::getEmptyKey());
+  }
+
+  static inline circt::FVInt getTombstoneKey() {
+    return circt::FVInt(DenseMapInfo<APInt>::getTombstoneKey());
+  }
+
+  static unsigned getHashValue(const circt::FVInt &Key);
+
+  static bool isEqual(const circt::FVInt &LHS, const circt::FVInt &RHS) {
+    return LHS == RHS;
+  }
+};
+} // namespace llvm
+
 #endif // CIRCT_SUPPORT_FVINT_H

lib/Dialect/LLHD/Transforms/CMakeLists.txt

@@ -1,18 +1,19 @@
 add_circt_dialect_library(CIRCTLLHDTransforms
-  TemporalRegions.cpp
-  PassRegistration.cpp
-  ProcessLoweringPass.cpp
+  DesequentializationPass.cpp
+  EarlyCodeMotionPass.cpp
   FunctionEliminationPass.cpp
   MemoryToBlockArgumentPass.cpp
-  EarlyCodeMotionPass.cpp
+  ProcessLoweringPass.cpp
   TemporalCodeMotionPass.cpp
+  TemporalRegions.cpp
 
   DEPENDS
   CIRCTLLHDTransformsIncGen
 
   LINK_LIBS PUBLIC
   CIRCTComb
   CIRCTHW
+  CIRCTSeq
   CIRCTLLHD
   MLIRIR
   MLIRControlFlowDialect