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Pull requests: llvm/circt

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Pull requests list

[LLHD] Add dedicated Mem2Reg pass LLHD
#8244 opened Feb 15, 2025 by fabianschuiki Loading…
[RTG] Move immediate type tablegen base to RTG dialect RTG Involving the `rtg` dialect
#8242 opened Feb 13, 2025 by maerhart Loading…
Bump LLVM for index CAPI
#8240 opened Feb 13, 2025 by maerhart Loading…
[PyRTG] Support targets and test arguments RTG Involving the `rtg` dialect
#8239 opened Feb 13, 2025 by maerhart Loading…
[PyRTG] Support sequences RTG Involving the `rtg` dialect
#8238 opened Feb 13, 2025 by maerhart Loading…
[verif.contract] add sby integration test
#8237 opened Feb 13, 2025 by leonardt Loading…
[PyRTG] Support bags RTG Involving the `rtg` dialect
#8236 opened Feb 13, 2025 by maerhart Loading…
[PyRTG] Support integers RTG Involving the `rtg` dialect
#8235 opened Feb 13, 2025 by maerhart Loading…
[circt-verilog-lsp-server] Add Verilog Language Server
#8234 opened Feb 13, 2025 by uenoku Loading…
[Arcilator] Allow running verif.simulation ops Arc Involving the `arc` dialect verif
#8233 opened Feb 12, 2025 by fabianschuiki Loading…
[LLHD][TCM] Fix CFG loops detection
#8230 opened Feb 12, 2025 by AndreyVV-100 Loading…
[PyRTG] Support sets RTG Involving the `rtg` dialect
#8229 opened Feb 12, 2025 by maerhart Loading…
[PyRTG] Wrapper around SSA values and label support RTG Involving the `rtg` dialect
#8228 opened Feb 12, 2025 by maerhart Loading…
[RTG][CAPI] Expose getter for bag and set element type RTG Involving the `rtg` dialect
#8227 opened Feb 12, 2025 by maerhart Loading…
[FIRRTL] Add folder for mul property op
#8222 opened Feb 11, 2025 by mtsokol Loading…
[FIRRTL] Add a folder for add property op
#8200 opened Feb 7, 2025 by mtsokol Loading…
[RTG][InlineSequences] Support interleave_sequences RTG Involving the `rtg` dialect
#8199 opened Feb 7, 2025 by maerhart Loading…
[RTG][Elaboration] Use malloc instead of IR for virtual registers and labels RTG Involving the `rtg` dialect
#8194 opened Feb 5, 2025 by maerhart Loading…
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