Finish 0.1.0-alpha.1

CHANGELOG.md

@@ -3,34 +3,10 @@
 All notable changes to this project will be documented in this file.
 This project uses [Semantic Versioning](https://semver.org/spec/v2.0.0.html).
 
-## [0.1.3] - 2024-07-02
+## [0.1.0-alpha.1] - 2024-07-05
 
-[0.1.3]: https://github.com/sunsided/lsm303dlhc-registers/releases/tag/v0.1.3
-
-### Internal
-
-- Improved documentation on the `ControlRegister3A::i1drdy1` field (accelerometer data ready interrupt).
-
-## [0.1.2] - 2024-07-02
-
-[0.1.2]: https://github.com/sunsided/lsm303dlhc-registers/releases/tag/v0.1.2
-
-### Fixed
-
-- Applied some field defaults for `MR_REG_M`, `CRA_REG_M` and `CRB_REG_M`.
-
-## [0.1.1] - 2024-07-01
-
-[0.1.1]: https://github.com/sunsided/lsm303dlhc-registers/releases/tag/v0.1.1
-
-### Changed
-
-- Renames some fields and types to more accurately describe functionality.
-
-## [0.1.0] - 2024-07-01
-
-[0.1.0]: https://github.com/sunsided/lsm303dlhc-registers/releases/tag/v0.1.0
+[0.1.0-alpha.1]: https://github.com/sunsided/l3gd20-registers/releases/tag/v0.1.0-alpha.1
 
 ### Added
 
-- Initial release providing the register types based on `bitfields` and `hardware-registers`.
+- Initial release.

Cargo.toml

@@ -18,8 +18,8 @@ defmt = ["dep:defmt"]
 [dependencies]
 bitfield-struct = "0.8.0"
 defmt = { version = "0.3.8", optional = true }
-# hardware-registers = "0.1.0"
-hardware-registers = { git = "http://github.com/sunsided/hardware-registers", features = ["i2c", "spi"] }
+hardware-registers = "0.2.0"
+# hardware-registers = { git = "http://github.com/sunsided/hardware-registers", features = ["i2c", "spi"] }
 
 [package.metadata.docs.rs]
 all-features = true

README.md

@@ -1,4 +1,4 @@
-# STMicroelectronics L3GD20 E-Compass Registers
+# STMicroelectronics L3GD20 Gyroscope Registers
 
 <!-- [![Crates.io][crates-image]][crates-link]
 [![Docs][docs-image]][docs-link] -->

src/gyro.rs

@@ -59,9 +59,9 @@ pub enum RegisterAddress {
     INT1_CFG = 0x30,
     /// See [`Int1SourceRegisterA`]. Read-only.
     INT1_SRC = 0x31,
-    /// See [`Int1ThresholdRegisterXL`]. Read-write.
+    /// See [`Int1ThresholdRegisterXH`]. Read-write.
     INT1_TSH_XH = 0x32,
-    /// See [`missing`]. Read-write.
+    /// See [`Int1ThresholdRegisterXL`]. Read-write.
     INT1_TSH_XL = 0x33,
     /// See [`Int1ThresholdRegisterYH`]. Read-write.
     INT1_TSH_YH = 0x34,
@@ -71,7 +71,7 @@ pub enum RegisterAddress {
     INT1_TSH_ZH = 0x36,
     /// See [`Int1ThresholdRegisterZL`]. Read-write.
     INT1_TSH_ZL = 0x37,
-    /// See [`missing`]. Read-write.
+    /// See [`Int1DurationRegister`]. Read-write.
     INT1_DURATION = 0x38,
 }
 
@@ -436,7 +436,7 @@ readable_register!(OutYHigh, RegisterAddress::OUT_Y_H);
 
 /// [`OUT_Z_L`](RegisterAddress::OUT_Z_L) (2Ch)
 ///
-/// Low byte of the 16-bit angular rate value. See [`OutZHighA`] for the high byte.
+/// Low byte of the 16-bit angular rate value. See [`OutZHigh`] for the high byte.
 ///
 /// ## Little Endian Data Order
 ///
@@ -566,7 +566,7 @@ pub struct Int1ConfigurationRegister {
 
 writable_register!(Int1ConfigurationRegister, RegisterAddress::INT1_CFG);
 
-/// [`INT1_SRC_A`](RegisterAddress::INT1_SRC_A) (31h)
+/// [`INT1_SRC`](RegisterAddress::INT1_SRC) (31h)
 #[bitfield(u8, order = Msb)]
 #[derive(PartialEq, Eq)]
 #[cfg_attr(feature = "defmt", derive(defmt::Format))]

src/lib.rs

@@ -1,6 +1,6 @@
-//! # STMicroelectronics LSM303DLHC E-Compass Registers
+//! # STMicroelectronics L3GD20 Gyrscope Registers
 //!
-//! This crate provides a typed map of the LSM303DLHC's I²C registers.
+//! This crate provides a typed map of the L3GD20's I²C/SPI registers.
 
 #![deny(missing_docs)]
 #![deny(warnings)]