CSC302: Digital Logic Design and Analysis [DLDA] & CSL301: Digital System Lab [DS Lab] <Semester III>
-
Updated
Mar 13, 2024
CSC302: Digital Logic Design and Analysis [DLDA] & CSL301: Digital System Lab [DS Lab] <Semester III>
Fixed Point FPGA-based Hardware Implementation of a 32-tap Low Pass FIR Filter for Audio Applications
Digital Systems Design, Sharif University of Technology Fall 2022, Instructor: Dr. Amin Foshati
Implementation of a low-pass FIR filter in Verilog HDL.
Digital Systems Design Lab, Sharif University of Technology Fall 2022
👾 My studies with Verilog and notions of digital systems.
This repository contains projects developed by students of the Bachelor of Computer Engineering program at Qazvin Islamic Azad University (QIAU). The projects cover various topics in computer engineering, including digital systems, microprocessor, logical circuits, computer graphics, and etc..
Cache Controller Project for COE758 Digital Systems Engineering.
Simulate a statement through Moore FSM, With a full explanation. This project was my last additional course project for Verilog in Digital Systems Design during my BS in Computer Engineering
My Verilog Codes for Digital Systems Design Course
DSDS (Digital system design and synthesis) Lab and class programs of 2021 - 25 batch.
Seven instructions digital processor for general purpose.
My interests and some collaborations
Repository focused on giving a complete introductory course to digital systems, applied to robotics and automation.
Digital systems class at uni
Add a description, image, and links to the digital-systems-design topic page so that developers can more easily learn about it.
To associate your repository with the digital-systems-design topic, visit your repo's landing page and select "manage topics."