VeeR EH1 core

FuseSoC-based SoC for VeeR EH1 and EL2

VeeR EL2 Core

FuseSoc Verification Automation

Example of how to get started with olofk/fusesoc.

Multi-port BRAM IP for ASIC and FPGA

Custom 6502 Video Game Console

This project implements the VGA protocol and allows custom images to be displayed to the screen using the Sipeed Tang Nano FPGA dev board.

Simple example of how to get started with the Tang Nano with FuseSoC.

Just a set of Dockerfiles and tools for FuseSoC

A quick SPI BFM to assist in SPI device testing and development

6502 Arcade Machine by UCSB IEEE

A set of common RTL cores that I've developed over time and organized into a FuseSoC library.

A simple I2C BFM

Find first set operation in Verilog-2001 with logarithmic complexity.

A template for starting a Verilog project with FuseSoC integration, Icarus simulation, Verilator linting, Yosys usage report, and VS Code syntax highlighting.

A simple UART BFM

A simple SHA-256 implementation in VHDL and Verilog, simulated using a basic UVM testbench.

16-bit RISC core

A simple test library for verilator