Fearless hardware design
-
Updated
Dec 9, 2024 - Verilog
#
hardware-accelerator
Here are 11 public repositories matching this topic...
SneakySnake:snake: is the first and the only pre-alignment filtering algorithm that works efficiently and fast on modern CPU, FPGA, and GPU architectures. It greatly (by more than two orders of magnitude) expedites sequence alignment calculation for both short and long reads. Described in the Bioinformatics (2020) by Alser et al. https://arxiv.o…
fpga gpu smith-waterman needleman-wunsch sequence-alignment long-reads minimap2 short-reads hardware-accelerator sequence-aligner edlib pre-alignment-filtering wavefront-alignment
-
Updated
Mar 31, 2023 - VHDL
A Flexible and Energy Efficient Accelerator For Sparse Convolution Neural Network
deep-neural-networks accelerator convolutional-neural-networks sparse-matrix gemm noc im2col hardware-accelerator eyeriss-v2
-
Updated
Aug 28, 2024 - Verilog
NPUsim: Full-Model, Cycle-Level, and Value-Aware Simulations of NPU Accelerators
machine-learning acceleration simulator deep-learning memory model accelerator architecture modeling hierarchy cycle-accurate deep-neural-network npu hardware-accelerator full-system value-aware functional-simulation timing-simulation
-
Updated
Nov 22, 2024 - C++
Open source RTL simulation acceleration on commodity hardware
hardware simulation rtl verilog systemverilog hardware-acceleration hardware-accelerator hardware-accelerators
-
Updated
Apr 13, 2023 - Python
NeuroSpector: Dataflow and Mapping Optimization of Deep Neural Network Accelerators
machine-learning acceleration deep-learning mapping optimization accelerator scheduler architecture scheduling optimizer dataflow hierarchy deep-neural-network hardware-accelerator
-
Updated
Nov 11, 2024 - C++
GenStore is the first in-storage processing system designed for genome sequence analysis that greatly reduces both data movement and computational overheads of genome sequence analysis by exploiting low-cost and accurate in-storage filters. Described in the ASPLOS 2022 paper by Mansouri Ghiasi et al. at https://people.inf.ethz.ch/omutlu/pub/GenS…
ftl ssd sequence-alignment read-mapping long-reads hardware-accelerator near-data-processing pre-alignment-filtering in-storage-processing exact-matching
-
Updated
Apr 6, 2022 - C
Hardware Accelerator implementation for solving an ordinary differential equation using Runge Kutta Numerical methods using VHDL language
-
Updated
Mar 9, 2024 - VHDL
Hardware Accelerator For Runge-Kutta solvers for ODE using Half Precision Floating Point Unit
-
Updated
Mar 8, 2024 - VHDL
Hardware accelerator for Capsule Neural Networks
-
Updated
Aug 8, 2023 - Python
Improve this page
Add a description, image, and links to the hardware-accelerator topic page so that developers can more easily learn about it.
Add this topic to your repo
To associate your repository with the hardware-accelerator topic, visit your repo's landing page and select "manage topics."